Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2003
06/24/2003US6583504 Semiconductor die with attached heat sink and transfer mold
06/24/2003US6583503 Semiconductor package with stacked substrates and multiple semiconductor dice
06/24/2003US6583497 Surface treatment of c-doped SiO2 film to enhance film stability during O2 ashing
06/24/2003US6583496 Single-control monolithic component for a composite bridge
06/24/2003US6583495 Variable capacitor and memory device employing the same
06/24/2003US6583494 Reduced base resistance in a bipolar transistor
06/24/2003US6583492 Capacitor element having a contact hole structure in an electrode structure
06/24/2003US6583491 Microelectronic fabrication having microelectronic capacitor structure fabricated therein
06/24/2003US6583490 One time programmable semiconductor nonvolatile memory device and method for production of same
06/24/2003US6583489 Method for forming interconnect structure with low dielectric constant
06/24/2003US6583488 Low density, tensile stress reducing material for STI trench fill
06/24/2003US6583487 Power component bearing interconnections
06/24/2003US6583486 Higher levels of integration, improved noise tolerance and effective isolation margins
06/24/2003US6583485 Schottky diode
06/24/2003US6583484 Method of manufacturing photodiode CMOS image sensor
06/24/2003US6583483 Semiconductor device and its manufacturing method
06/24/2003US6583479 Sidewall NROM and method of manufacture thereof for non-volatile memory cells
06/24/2003US6583478 Transfer circuit of semiconductor device and structure thereof
06/24/2003US6583475 N-channel metal oxide transistor with surge protection cir-cuit connected in parallel preventing electrostatic breakdown
06/24/2003US6583473 Semiconductor devices containing surface channel mos transistors
06/24/2003US6583472 Semiconductor device and method of manufacturing thereof
06/24/2003US6583471 Semiconductor device having first and second insulating films
06/24/2003US6583469 Channel region with wider tappered source/drain abutments avoiding high overlap capacitance
06/24/2003US6583468 Decreased dislocation density of epitaxially grown nitride layer; field effect transistors
06/24/2003US6583467 Semiconductor integrated circuit device
06/24/2003US6583466 Vertical split gate flash memory device in an orthogonal array of rows and columns with devices in columns having shared source regions
06/24/2003US6583465 Code addressable memory cell in a flash memory device
06/24/2003US6583464 Reduced fluctuations in retention time of stored charge
06/24/2003US6583463 Semiconductor integrated circuit device with information storage capacitor having ruthenium dioxide lower electrode and crystallized TA2O5 capacitor insulator
06/24/2003US6583462 Vertical DRAM having metallic node conductor
06/24/2003US6583461 Semiconductor device and method of manufacturing the same
06/24/2003US6583460 Method of forming a metal to polysilicon contact in oxygen environment
06/24/2003US6583459 Random access memory cell and method for fabricating same
06/24/2003US6583458 Semiconductor integrated circuit including a DRAM and an analog circuit
06/24/2003US6583457 Recessed container cells and method of forming the same
06/24/2003US6583455 Fabrication of low resistance, non-alloyed, OHMIC contacts to INP using non-stoichiometric INP layers
06/24/2003US6583454 Nitride based transistors on semi-insulating silicon carbide substrates
06/24/2003US6583453 Semiconductor device having a voltage-regulator device
06/24/2003US6583451 Process for fabricating a network of nanometric lines made of single-crystal silicon and device obtained
06/24/2003US6583450 Reduced stacking fault defects
06/24/2003US6583448 Light emitting diode and method for manufacturing the same
06/24/2003US6583444 Semiconductor packages having light-sensitive chips
06/24/2003US6583441 Capacitor constructions comprising a nitrogen-containing layer over a rugged polysilicon layer
06/24/2003US6583440 Soi substrate, element substrate, semiconductor device, electro-optical apparatus, electronic equipment, method of manufacturing the soi substrate, method of manufacturing the element substrate, and method of manufacturing the electro-optical apparatus
06/24/2003US6583439 Semiconductor device
06/24/2003US6583437 Semiconductor device and method of manufacturing the same
06/24/2003US6583436 Tunable two dimensional lattice that can be replicated at periodic intervals along the growth direction to form three dimensional lattice
06/24/2003US6583431 Charged particle beam lithography apparatus for forming pattern on semi-conductor
06/24/2003US6583430 Electron beam exposure method and apparatus
06/24/2003US6583414 Method of inspecting pattern and inspecting instrument
06/24/2003US6583383 Method and apparatus for cutting a semiconductor wafer
06/24/2003US6583355 Bladder insert for encapsulant displacement
06/24/2003US6583201 Polymeric resin, a conductive filler, a curing agent, an optional (reactive) diluent, and as corrosion inhibitor, one of 6-hydroxyquinoline, 2-hydroxyquinoline or piperidene to improve contact resistance in harsh conditions
06/24/2003US6583071 Ultrasonic spray coating of liquid precursor for low K dielectric coatings
06/24/2003US6583067 Method of avoiding dielectric layer deterioration with a low dielectric constant
06/24/2003US6583066 Methods for fabricating a semiconductor chip having CMOS devices and fieldless array
06/24/2003US6583065 Sidewall polymer forming gas additives for etching processes
06/24/2003US6583064 Low contamination high density plasma etch chambers and methods for making the same
06/24/2003US6583063 Plasma etching of silicon using fluorinated gas mixtures
06/24/2003US6583062 Method of improving an aspect ratio while avoiding etch stop
06/24/2003US6583060 Dual depth trench isolation
06/24/2003US6583059 Semiconductor device and method of manufacturing the same
06/24/2003US6583058 Solid hermetic via and bump fabrication
06/24/2003US6583057 Method of forming a semiconductor device having a layer deposited by varying flow of reactants
06/24/2003US6583056 Storage electrode of a semiconductor memory device and method for fabricating the same
06/24/2003US6583055 Method of forming stepped contact trench for semiconductor devices
06/24/2003US6583054 Method for forming conductive line in semiconductor device
06/24/2003US6583053 Use of a sacrificial layer to facilitate metallization for small features
06/24/2003US6583052 Method of fabricating a semiconductor device having reduced contact resistance
06/24/2003US6583051 Method of manufacturing an amorphized barrier layer for integrated circuit interconnects
06/24/2003US6583050 Semiconductor wafer with improved flatness, and process for producing the semiconductor wafer
06/24/2003US6583049 Semiconductor integrated circuit device and method for making the same
06/24/2003US6583048 Chemical vapor deposition from a silyl ether, a silyl ether oligomer, or an organosilicon compound containing one or more reactive groups, to form an interlayer dielectric film having a dielectric constant of 3.5 or less.
06/24/2003US6583047 Method for eliminating reaction between photoresist and OSG
06/24/2003US6583046 Post-treatment of low-k dielectric for prevention of photoresist poisoning
06/24/2003US6583045 Chip design with power rails under transistors
06/24/2003US6583043 Dielectric between metal structures and method therefor
06/24/2003US6583042 Semiconductor method of making electrical connection between an electrically conductive line and a node location, and integrated circuitry
06/24/2003US6583040 Method of making a pillar in a laminated structure for a semiconductor chip assembly
06/24/2003US6583039 Method of forming a bump on a copper pad
06/24/2003US6583038 Polycide structure and method for forming polycide structure
06/24/2003US6583037 Method for fabricating gate of semiconductor device
06/24/2003US6583036 Method of manufacturing a semiconductor device
06/24/2003US6583035 Semiconductor package with a controlled impedance bus and method of forming same
06/24/2003US6583034 Semiconductor structure including a compliant substrate having a graded monocrystalline layer and methods for fabricating the structure and semiconductor devices including the structure
06/24/2003US6583032 Method for manufacturing semiconductor chips
06/24/2003US6583030 Method for producing an integrated circuit processed on both sides
06/24/2003US6583029 Production method for silicon wafer and SOI wafer, and SOI wafer
06/24/2003US6583028 Methods of forming trench isolation regions
06/24/2003US6583027 Manufacturing method of semiconductor device and designing method of semiconductor device
06/24/2003US6583026 Process for forming a low k carbon-doped silicon oxide dielectric material on an integrated circuit structure
06/24/2003US6583025 Method of forming a trench isolation structure comprising annealing the oxidation barrier layer thereof in a furnace
06/24/2003US6583024 High resistivity silicon wafer with thick epitaxial layer and method of producing same
06/24/2003US6583023 Method for making semiconductor integrated circuits
06/24/2003US6583022 Methods of forming roughened layers of platinum and methods of forming capacitors
06/24/2003US6583021 Method of fabricating capacitor having hafnium oxide
06/24/2003US6583020 Method for fabricating a trench isolation for electrically active components
06/24/2003US6583018 Method of ion implantation
06/24/2003US6583017 Self aligned channel implant, elevated S/D process by gate electrode damascene
06/24/2003US6583016 Doped spacer liner for improved transistor performance