Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2003
09/30/2003US6627859 Method and apparatus for temperature control of heater
09/30/2003US6627846 Laser-driven cleaning using reactive gases
09/30/2003US6627824 Support circuit with a tapered through-hole for a semiconductor chip assembly
09/30/2003US6627823 Multilayered connection plate
09/30/2003US6627683 Curing cyclic hydrocarbon including oxirane or thiirane moiety joined by (thio)ester by exposure to heat and decomposition; polyepoxides and polythioepoxides
09/30/2003US6627669 Low dielectric materials and methods of producing same
09/30/2003US6627588 Liquid cleaning composition and method for removal of photoresist including an aliphatic alcohol. Preferably, the alcohol is isopropyl alcohol. Additionally, an alcohol/base mixture can be used to remove photoresist, rather than alcohol
09/30/2003US6627587 Mixture of alkanolamine, tetraalktlammonium hydroxide, fluoride compound and corrosion inhbitor
09/30/2003US6627560 Method of manufacturing semiconductor device
09/30/2003US6627558 Apparatus and method for selectively restricting process fluid flow in semiconductor processing
09/30/2003US6627557 Semiconductor device and method for manufacturing the same
09/30/2003US6627556 Method of chemically altering a silicon surface and associated electrical devices
09/30/2003US6627555 Method and circuit for minimizing the charging effect during manufacture of semiconductor devices
09/30/2003US6627554 Semiconductor device manufacturing method
09/30/2003US6627553 Composition for removing side wall and method of removing side wall
09/30/2003US6627552 Method for preparing epitaxial-substrate and method for manufacturing semiconductor device employing the same
09/30/2003US6627551 Method for avoiding microscratch in interlevel dielectric layer chemical mechanical polishing process
09/30/2003US6627550 Post-planarization clean-up
09/30/2003US6627549 Methods for making nearly planar dielectric films in integrated circuits
09/30/2003US6627548 Process for treating semiconductor substrates
09/30/2003US6627547 Hot metallization process
09/30/2003US6627546 Process for removing contaminant from a surface and composition useful therefor
09/30/2003US6627545 Method of forming silicon oxide layer and method of manufacturing thin film transistor thereby
09/30/2003US6627544 Method of making a metal film pattern
09/30/2003US6627543 Low-temperature sputtering system and method for salicide process
09/30/2003US6627542 Continuous, non-agglomerated adhesion of a seed layer to a barrier layer
09/30/2003US6627541 Reflow method for construction of conductive vias
09/30/2003US6627540 Method for forming dual damascene structure in semiconductor device
09/30/2003US6627539 Method of forming dual-damascene interconnect structures employing low-k dielectric materials
09/30/2003US6627538 Focused ion beam deposition
09/30/2003US6627537 Bit line and manufacturing method thereof
09/30/2003US6627535 Methods and apparatus for forming a film on a substrate
09/30/2003US6627534 Semiconductor fabrication process and structure with minimal capacitive coupling between conductors
09/30/2003US6627533 Method of manufacturing an insulation film in a semiconductor device
09/30/2003US6627532 Method of decreasing the K value in SiOC layer deposited by chemical vapor deposition
09/30/2003US6627531 Three dimensional device integration method and integrated device
09/30/2003US6627530 Patterning three dimensional structures
09/30/2003US6627529 Capacitance reduction by tunnel formation for use with semiconductor device
09/30/2003US6627528 Semiconductor device and its manufacturing process
09/30/2003US6627527 Method to reduce metal silicide void formation
09/30/2003US6627526 Method for fabricating a conductive structure for a semiconductor device
09/30/2003US6627525 Method for preventing polycide gate spiking
09/30/2003US6627524 Methods of forming transistor gates; and methods of forming programmable read-only memory constructions
09/30/2003US6627523 Method of forming a metal wiring in a semiconductor device
09/30/2003US6627520 Nitride semiconductor substrate and method for manufacturing the same, and nitride semiconductor device using nitride semiconductor substrate
09/30/2003US6627519 Method of manufacturing an SOI (silicon on insulator) wafer
09/30/2003US6627517 Semiconductor package with improved thermal cycling performance, and method of forming same
09/30/2003US6627516 Method of fabricating a light receiving device
09/30/2003US6627515 Method of fabricating a non-floating body device with enhanced performance
09/30/2003US6627514 Semiconductor device having a Y-shaped isolation layer and simplified method for manufacturing the Y-shaped isolation layer to prevent divot formation
09/30/2003US6627513 Method of measuring resistance in deep trench
09/30/2003US6627512 Method of manufacturing a semiconductor device
09/30/2003US6627511 Reduced stress isolation for SOI devices and a method for fabricating
09/30/2003US6627510 Method of making self-aligned shallow trench isolation
09/30/2003US6627509 Surface flashover resistant capacitors and method for producing same
09/30/2003US6627508 Method of forming capacitors containing tantalum
09/30/2003US6627507 Integrated circuit and method of using porous silicon to achieve component isolation in radio frequency applications
09/30/2003US6627506 Thin tensile layers in shallow trench isolation and method of making same
09/30/2003US6627505 Method of producing SOI MOSFET having threshold voltage of central and edge regions in opposite directions
09/30/2003US6627504 Stacked double sidewall spacer oxide over nitride
09/30/2003US6627503 Method of forming a multilayer dielectric stack
09/30/2003US6627502 Method for forming high concentration shallow junctions for short channel MOSFETs
09/30/2003US6627501 Method of forming tunnel oxide layer
09/30/2003US6627500 Method of fabricating nitride read only memory
09/30/2003US6627499 Semiconductor device and method of manufacturing the same
09/30/2003US6627498 Memory cell fabrication method and memory cell configuration
09/30/2003US6627497 Semiconductor integrated circuit device and method of manufacturing the same
09/30/2003US6627496 Process for producing structured layers, process for producing components of an integrated circuit, and process for producing a memory configuration
09/30/2003US6627495 Method for forming a capacitor in a semiconductor device
09/30/2003US6627494 Method for forming gate electrode of flash memory
09/30/2003US6627493 Self-aligned method for fabricating a capacitor under bit-line (cub) dynamic random access memory (DRAM) cell structure
09/30/2003US6627492 Methods of forming polished material and methods of forming isolation regions
09/30/2003US6627491 Method of manufacturing non volatile memory device having two charge storage regions
09/30/2003US6627490 Semiconductor device and method for fabricating the same
09/30/2003US6627489 Method of producing CMOS transistors and related devices
09/30/2003US6627488 Method for fabricating a semiconductor device using a damascene process
09/30/2003US6627487 Semiconductor device and manufacturing method thereof
09/30/2003US6627486 Method for manufacturing semiconductor and method for manufacturing semiconductor device
09/30/2003US6627485 Electro-optical device, method for fabricating the same, and electronic apparatus
09/30/2003US6627484 Method of forming a buried interconnect on a semiconductor on insulator wafer and a device including a buried interconnect
09/30/2003US6627481 Method of manufacturing a semiconductor package with a lead frame having a support structure
09/30/2003US6627478 Method of making a microelectronic assembly with multiple lead deformation using differential thermal expansion/contraction
09/30/2003US6627477 Method of assembling a plurality of semiconductor devices having different thickness
09/30/2003US6627475 Buried photodiode structure for CMOS image sensor
09/30/2003US6627473 Compound semiconductor device with delta doped layer under etching stopper layer for decreasing resistance between active layer and ohmic electrode and process of fabrication thereof
09/30/2003US6627471 Method of manufacturing an array substrate having drive integrated circuits
09/30/2003US6627470 Array substrate for use in LCD device and method of fabricating same
09/30/2003US6627468 Method for manufacturing optical element, optical element, optical system using optical element, optical apparatus and exposure apparatus using optical system, and method for manufacturing device
09/30/2003US6627466 Method and apparatus for detecting backside contamination during fabrication of a semiconductor wafer
09/30/2003US6627464 Adaptive plasma characterization system
09/30/2003US6627463 Situ measurement of film nitridation using optical emission spectroscopy
09/30/2003US6627462 Semiconductor device having a capacitor and method for the manufacture thereof
09/30/2003US6627391 Resist compositions containing lactone additives
09/30/2003US6627389 Formation of a metal silicon nitride antireflective coating layer that resist "foot poisoning" of a masking layer and its detrimental effects
09/30/2003US6627384 Photoresist composition for resist flow process and process for forming a contact hole using the same
09/30/2003US6627383 Photoresist monomer comprising bisphenol derivatives and polymers thereof
09/30/2003US6627382 Includes perfluoro-2,2-dimethy-1,3-dioxole derivatives and vinyl derivatives; for F2 excimer laser
09/30/2003US6627381 Chemical amplification type positive resist composition
09/30/2003US6627379 Photoresist is mixture of polymers
09/30/2003US6627378 Exposed region is selectively silylated with a silylating agent. The silylated region serves as a mask, and the non-silylated region is dry-etched by O2 plasma
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