Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2003
10/02/2003US20030184336 Semiconductor integrated circuit device and testing method thereof
10/02/2003US20030184332 Probe driving method, and probe apparatus
10/02/2003US20030184330 Probe card and method for manufacturing probe card
10/02/2003US20030184316 Measuring apparatus, purity controller, and mixing ratio controller for insulative fluid
10/02/2003US20030184311 Circuit structure and semiconductor integrated circuit
10/02/2003US20030184235 Plasma producing apparatus and doping apparatus
10/02/2003US20030183998 Machining apparatus
10/02/2003US20030183952 Method of removing free halogen from a halogenated polymer insulating layer of a semiconductor device and resulting semiconductor device
10/02/2003US20030183951 Flip-chip bonding method
10/02/2003US20030183950 Semiconductor die packages with standard ball grid array footprint and method for assembling the same
10/02/2003US20030183949 Conductive material for integrated circuit fabrication
10/02/2003US20030183947 Tip end of each sprout-shaped metal bump is surrounded by a protective resin integrally swollen from adhesive rein layer such that a tip end face of each bump is exposed to the outside.
10/02/2003US20030183945 Chip size stack package and method of fabricating the same
10/02/2003US20030183943 Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
10/02/2003US20030183942 Semiconductor device having damascene interconnection structure that prevents void formation between interconnections
10/02/2003US20030183941 Semiconductor integrated circuit device and process for manufacturing the same
10/02/2003US20030183940 Improved dielectric breakdown strength between copper interconnects and reduced capacitance between the copper interconnects.
10/02/2003US20030183939 Semiconductor device with copper wirings
10/02/2003US20030183938 Methods of forming metal-containing films over surfaces of semiconductor substrates; and semiconductor constructions
10/02/2003US20030183937 Low-k interconnect structure comprised of a multilayer of spin-on porous dielectrics
10/02/2003US20030183936 Semiconductor device and method for fabricating the same
10/02/2003US20030183934 Method and apparatus for stacking multiple die in a flip chip semiconductor package
10/02/2003US20030183933 Semiconductor chip having a bump electrode over its main surface. The bump electrode has at least one protrusion on the top surface thereof. A lead is electrically connected to the top surface of the bump electrode, and is positioned
10/02/2003US20030183932 Semiconductor element, manufacturing method thereof and BGA-type semiconductor device
10/02/2003US20030183931 Semiconductor apparatus, fixture for measuring characteristics therefor, and semiconductor device characteristics measuring apparatus
10/02/2003US20030183929 System and method for reconditioning electronic components
10/02/2003US20030183928 High-frequency switch device and electronic device using the same
10/02/2003US20030183927 Microwave integrated circuit
10/02/2003US20030183926 Semiconductor device and semiconductor packaging device
10/02/2003US20030183923 Semiconductor device and method of forming a semiconductor device
10/02/2003US20030183922 A diode coupling-based arrangement back-biases each of the semiconductor substrates of a plurality of integrated circuits at the maximum (e.g., most negative) DC voltage applied to any individual circuit, irrespective of a potential variation
10/02/2003US20030183920 Hermetic electric component package
10/02/2003US20030183918 Tape Carrier Package
10/02/2003US20030183913 Method of eliminating back-end rerouting in ball grid array packaging
10/02/2003US20030183911 Electronic package and method
10/02/2003US20030183910 Encapsulation method of leadless semiconductor package. The method comprises the steps of: (a) attaching a plurality of dice to the die pads on the cavities of a lead frame, the lead frame having a plurality of cavities arranged in matrix
10/02/2003US20030183909 Methods and apparatus for disposing a thermal interface material between a heat source and a heat dissipation device
10/02/2003US20030183908 Semiconductor device and method of manufacturing the same
10/02/2003US20030183907 Resin-molded device and manufacturing apparatus thereof
10/02/2003US20030183905 Interconnection structure and interconnection structure formation method
10/02/2003US20030183904 Method and system for magnetically assisted statistical assembly of wafers
10/02/2003US20030183903 Semiconductor device
10/02/2003US20030183901 MOS transistor apparatus and method of manufacturing same
10/02/2003US20030183900 High-voltage diode and method for fabricating the high-voltage diode
10/02/2003US20030183899 Semiconductor component and method of manufacture
10/02/2003US20030183898 Semiconductor device and method for manufacturing the same
10/02/2003US20030183897 Metal oxide temperature monitor
10/02/2003US20030183896 Epitaxially grown compound semiconductor film and compound semiconductor multi-layer structure
10/02/2003US20030183895 Semiconductor device and method of manufacturing the same
10/02/2003US20030183889 Magnetic memory device
10/02/2003US20030183886 Semiconductor device and method of fabricating the same
10/02/2003US20030183885 Field effect transistor and method of fabricating the same
10/02/2003US20030183884 Interdigital capacitor and method for adjusting the same
10/02/2003US20030183883 Non-volatile semiconductor memory device having memory cell array suitable for high density and high integration
10/02/2003US20030183882 UV-programmed P-type Mask ROM and fabrication thereof
10/02/2003US20030183881 Forming MOS transistors include forming lightly and heavily doped source/drain regions adjacent to one another in a substrate and a gate electrode with a sidewall spacer thereon. A salicide process is performed on a surface of the heavily
10/02/2003US20030183880 Semiconductor device covering transistor and resistance with capacitor material
10/02/2003US20030183877 Semiconductor device and manufacturing method of semiconductor device
10/02/2003US20030183876 Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate
10/02/2003US20030183875 Semiconductor device and semiconductor device production system
10/02/2003US20030183874 Semiconductor device
10/02/2003US20030183873 Nonvolatile semiconductor memory device and process of production and write method thereof
10/02/2003US20030183872 Semiconductor device and semiconductor memory using the same
10/02/2003US20030183871 Floating-gate analog circuit
10/02/2003US20030183870 Semiconductor memory device and manufacturing method thereof
10/02/2003US20030183869 Manufacturing process of an interpoly dielectric structure for non-volatile semiconductor integrated memories
10/02/2003US20030183865 Capacitor structure and method for fabricating the same
10/02/2003US20030183864 Device having interdigital capacitor
10/02/2003US20030183863 Semiconductor device and transceiver apparatus
10/02/2003US20030183862 Semiconductor device having metal-insulator-metal capacitor and fabrication method thereof
10/02/2003US20030183861 Dynamic random access memory and the method for fabricating thereof
10/02/2003US20030183860 Semiconductor integrated circuit device including dummy patterns located to reduce dishing
10/02/2003US20030183859 Single transistor rare earth manganite ferroelectric nonvolatile memory cell
10/02/2003US20030183856 Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same
10/02/2003US20030183854 Semiconductor device, method of manufacturing the same, and method of designing the same
10/02/2003US20030183853 Polysilicon evaluating method, polysilicon inspection apparatus and method for preparation of thin film transistor
10/02/2003US20030183851 Tracking circuit
10/02/2003US20030183849 Methods and memory structures using tunnel-junction device as control element
10/02/2003US20030183848 Device for detecting a magnetic field, magnetic field measure and current meter
10/02/2003US20030183846 Hetero-junction bipolar transistor
10/02/2003US20030183845 Bipolar transistor
10/02/2003US20030183844 Semiconductor device and method of fabricating the same
10/02/2003US20030183843 Semiconductor apparatus with improved esd withstanding voltage
10/02/2003US20030183833 Optical semiconductor device and method of fabricating the same
10/02/2003US20030183832 Semiconductor substrate, method of manufacturing the semiconductor substrate, semiconductor device and pattern forming method
10/02/2003US20030183831 Semiconductor light-emitting device with isolation trenches, and method of fabricating same
10/02/2003US20030183828 Fabrication method thereof. The p-type ohmic electrode in a GaN based optical device is fabricated using a rutile structure transition metal layer, such as an Ru, Ir or Os layer, or an oxide layer thereof, or using a double layer
10/02/2003US20030183827 Nitride semiconductor device comprising: a first semiconductor layer made of first nitride semiconductor; a facet-forming layer that is formed on the main surface of said first semiconductor layer, contains aluminum, has a plurality of
10/02/2003US20030183823 Semiconductor device with components embedded in backside diamond layer
10/02/2003US20030183822 Process for forming metalized contacts to periphery transistors
10/02/2003US20030183821 Semiconductor integrated circuit and method of fabricating same
10/02/2003US20030183820 Liquid crystal display for preventing galvanic phenomenon
10/02/2003US20030183819 Semiconductor device and method for fabricating the same
10/02/2003US20030183817 Organic field effect transistor, method for structuring an ofet and integrated circuit
10/02/2003US20030183787 EUV radiation source
10/02/2003US20030183782 Technique for writing with a raster scanned beam
10/02/2003US20030183780 Ion beam charge neutralizer and method therefor
10/02/2003US20030183778 Electron beam exposure apparatus and electron beam deflection apparatus
10/02/2003US20030183773 Electron beam exposure system and electron lens
10/02/2003US20030183699 Semiconductor integrated circuit, radio frequency identification transponder, and non-cotact IC card
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