Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2003
10/02/2003WO2003023847A3 Integrated circuit, portable device and method for manufacturing an integrated circuit
10/02/2003WO2003019664A3 Non-volatile semiconductor memory
10/02/2003WO2003019637A3 Method for thermal treatment of the surface layer of a semiconductor by means of a pulsed laser
10/02/2003WO2003015181B1 Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate
10/02/2003WO2003012832A3 Multiple epitaxial region substrate and technique for making the same
10/02/2003WO2003010827A3 Trench-gate semiconductor devices, and their manufacture
10/02/2003WO2003010799A3 Plasma ashing process
10/02/2003WO2003008984A3 Test head docking system and method
10/02/2003WO2003007061A3 A method of forming a reflective electrode and a liquid crystal display device
10/02/2003WO2002099534A3 Lighting system with a plurality of individual grids
10/02/2003WO2002079880A3 Method for adjusting the overlay of two masking planes in a photolithographic process
10/02/2003WO2002078076A3 Method for realizing wiring options in an integrated circuit and a corresponding integrated circuit
10/02/2003WO2001097286A3 High density three dimensional chip package assembly systems and methods
10/02/2003US20030188289 LSI mask manufacturing system, LSI mask manufacturing method and LSI mask manufacturing program
10/02/2003US20030188288 Mask data generating apparatus, a computer implemented method for generating mask data and a computer program for controlling the mask data generating apparatus
10/02/2003US20030188287 Mask-programmable logic devices with programmable gate array sites
10/02/2003US20030188277 Method of evaluating semiconductor integrated circuit to be designed in consideration of standby DC leakage current
10/02/2003US20030188209 Control circuit, electronic circuit, and method of saving power
10/02/2003US20030187840 Metrology diffraction signal adaptation for tool-to-tool matching
10/02/2003US20030187750 Photomask supply system with photomask production period shortened
10/02/2003US20030187537 Installation for processing a semiconductor wafer and method for operating the installation
10/02/2003US20030187536 Production management method
10/02/2003US20030187533 Process managing apparatus for managing production process including production fluctuation process
10/02/2003US20030187248 Using an aromatic isothiocyanate; forming adduct
10/02/2003US20030187177 Heat and chemical resistance; dielectrics
10/02/2003US20030187139 Low dielectric constant organic dielectrics based on cage-like structures
10/02/2003US20030186951 Compositions and methods for enhancing corticosteroid delivery
10/02/2003US20030186685 Module for generating circuits for analysing bit strings inside data cells, method for generating this type of circuit and relative circuit
10/02/2003US20030186634 Polishing particles and a polishing agent
10/02/2003US20030186623 Method and apparatus for heating polishing pad
10/02/2003US20030186622 Polishing method and polishing apparatus
10/02/2003US20030186621 Method for determining chemical mechanical polishing time
10/02/2003US20030186566 Contactor, method for manufacturing such contactor, and testing method using such contactor
10/02/2003US20030186563 Thermal processing apparatus and thermal processing method
10/02/2003US20030186562 Method for manufacturing semiconductor device employing solid phase diffusion
10/02/2003US20030186561 Deposition of film layers
10/02/2003US20030186560 Gaseous phase growing device
10/02/2003US20030186559 Method of manufacturing a compound semiconductor by heating a layered structure including rare earth transition metal
10/02/2003US20030186558 Planarization for integrated circuits
10/02/2003US20030186557 Fabrication method for lines of semiconductor device
10/02/2003US20030186556 Methods used in fabricating gates in integrated circuit device structures
10/02/2003US20030186555 Utilizing chemical dry etching for forming rounded corner in shallow trench isolation process
10/02/2003US20030186554 RTP process chamber pressure control
10/02/2003US20030186553 Process and device for cleaning a semiconductor wafer
10/02/2003US20030186552 Method for producing magnetic memory device
10/02/2003US20030186551 Integration scheme for metal gap fill with HDP and fixed abrasive CMP
10/02/2003US20030186549 Endpoint control for small open area by RF source parameter Vdc
10/02/2003US20030186548 Semiconductor configuration and method for fabricating the configuration
10/02/2003US20030186547 Method for forming fine patterns in semiconductor device
10/02/2003US20030186546 Method and system for controlling the chemical mechanical polishing of substrates by calculating an overpolishing time and/or a polishing time of a final polishing step
10/02/2003US20030186545 Variable temperature processes for tunable electrostatic chuck
10/02/2003US20030186544 Method of manufacturing a semiconductor device
10/02/2003US20030186543 Copper transition layer for improving copper interconnection reliability
10/02/2003US20030186542 Method for reducing gouging during via formation
10/02/2003US20030186541 Gradient barrier layer for copper back-end-of-line technology
10/02/2003US20030186540 Method and apparatus for forming fine circuit interconnects
10/02/2003US20030186539 Methods for forming metal interconnections for semiconductor devices having multiple metal depositions
10/02/2003US20030186538 Inter-metal dielectric patterns and method of forming the same
10/02/2003US20030186537 Method for fabricating electronic device
10/02/2003US20030186536 Via formation in integrated circuits by use of sacrificial structures
10/02/2003US20030186535 Method of making semiconductor device using a novel interconnect cladding layer
10/02/2003US20030186534 Method for manufacturing semiconductor device using dual-damascene techniques
10/02/2003US20030186533 Method for forming contact plug in semiconductor device
10/02/2003US20030186532 Method of forming a titanium-containing glue layer
10/02/2003US20030186531 Local interconnect
10/02/2003US20030186530 Methods of fabricating buried digit lines
10/02/2003US20030186529 Method of manufacturing semiconductor device having opening
10/02/2003US20030186528 Method for producing tin/lead alloy balls for packaging semiconductors
10/02/2003US20030186527 Method for producing a contact substrate and corresponding contact substrate
10/02/2003US20030186526 Method for contact profile improvement
10/02/2003US20030186525 Method for forming contact plug in semiconductor device
10/02/2003US20030186524 Method of forming metal interconnection layer in semiconductor device
10/02/2003US20030186523 Method for forming an improved metal silicide portion in a silicon-containing conductive region in an integrated circuit
10/02/2003US20030186521 Method of transferring thin film functional material to a semiconductor substrate or optimized substrate using a hydrogen ion splitting technique
10/02/2003US20030186520 Method of diffusing zinc into article and method of heating article
10/02/2003US20030186519 Dopant diffusion and activation control with athermal annealing
10/02/2003US20030186518 Process of passivating a metal-gated complementary metal oxide semiconductor
10/02/2003US20030186517 Method of and apparatus for manufacturing semiconductor device
10/02/2003US20030186516 Method for fabricating semiconductor device
10/02/2003US20030186515 Methods for simultaneously depositing layers over pluralities of discrete semiconductor substrate
10/02/2003US20030186514 Nano-structure and method of manufacturing nano-structure
10/02/2003US20030186513 Wafer thinning using magnetic mirror plasma
10/02/2003US20030186511 Method of forming an implantation-induced isolation
10/02/2003US20030186510 Seniconductor memory device with capacitor
10/02/2003US20030186509 Method of manufacturing semiconductor device
10/02/2003US20030186508 Methods of forming source/drain regions using multilayer side wall spacers and structures so formed
10/02/2003US20030186507 Field-effect-controllable semiconductor component and method for fabricating the component
10/02/2003US20030186506 Split gate flash memory and formation method thereof
10/02/2003US20030186505 Method of manufacturing semiconductor device
10/02/2003US20030186503 Method of making self-aligned shallow trench isolation
10/02/2003US20030186502 Structure and methods for process integration in vertical dram cell fabrication
10/02/2003US20030186501 Methods of forming semiconductor constructions
10/02/2003US20030186500 Integrated circuit including, and fabrication method for producing, bipolar and mosfet transistors
10/02/2003US20030186499 Structure for oxide/silicon nitride interface substructure improvements
10/02/2003US20030186498 Method for fabricating metal interconnection with reliability using ionized physical vapor deposition
10/02/2003US20030186497 Methods of polishing, interconnect-fabrication, and producing semiconductor devices
10/02/2003US20030186496 Methods for protecting intermediate conductive elements of semiconductor device assemblies
10/02/2003US20030186494 Thin films and methods for the preparation thereof
10/02/2003US20030186493 Method and device for making substrates
10/02/2003US20030186492 Method to form gate conductor structures of dual doped polysilicon
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