Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2003
11/04/2003US6643168 Nonvolatile magnetic storage device
11/04/2003US6643167 Semiconductor memory
11/04/2003US6643165 Electromechanical memory having cell selection circuitry constructed with nanotube technology
11/04/2003US6643160 Data bus architecture for integrated circuit devices having embedded dynamic random access memory (DRAM) with a large aspect ratio providing reduced capacitance and power requirements
11/04/2003US6643159 Cubic memory array
11/04/2003US6643117 Ferro-electric capacitor and method of fabrication of the ferro-electric capacitor
11/04/2003US6643115 Electrostatic chuck
11/04/2003US6643113 Low voltage modular room ionization system
11/04/2003US6643017 Method and system for controlling the photolithography process
11/04/2003US6643008 Detecting residual photoresist on wafers using light reflec-tion
11/04/2003US6642997 Substrate conveying system in exposure apparatus
11/04/2003US6642996 Exposure apparatus
11/04/2003US6642853 Movable wireless sensor device for performing diagnostics with a substrate processing system
11/04/2003US6642775 Potential detector and semiconductor integrated circuit
11/04/2003US6642773 Charge pump circuit without body effects
11/04/2003US6642732 Probe station thermal chuck with shielding for capacitive current
11/04/2003US6642731 Probe structure and manufacturing method thereof
11/04/2003US6642729 Probe card for tester head
11/04/2003US6642728 Holder of electroconductive contactor, and method for producing the same
11/04/2003US6642723 Apparatus monitoring the deposition of a liquid-to-pasty medium on a substrate
11/04/2003US6642675 Charged particle beam exposing apparatus
11/04/2003US6642627 Semiconductor chip having bond pads and multi-chip package
11/04/2003US6642626 Ball grid array IC package and manufacturing method thereof
11/04/2003US6642623 Multi-layered copper bond pad for an integrated circuit
11/04/2003US6642621 Capacitor-type semiconductor device
11/04/2003US6642620 Integrated circuits having low resistivity contacts and the formation thereof using an in situ plasma doping and clean
11/04/2003US6642619 System and method for adhesion improvement at an interface between fluorine doped silicon oxide and tantalum
11/04/2003US6642615 Semiconductor device and method of manufacturing the same, circuit board and electronic instrument
11/04/2003US6642612 Lead-bond type chip package and manufacturing method thereof
11/04/2003US6642610 Wire bonding method and semiconductor package manufactured using the same
11/04/2003US6642609 Leadframe for a semiconductor device having leads with land electrodes
11/04/2003US6642608 Josephson junction with high sheet resistance and increased critical current density
11/04/2003US6642606 Method for producing siliconized polysilicon contacts in integrated semiconductor structures
11/04/2003US6642605 Semiconductor device and a process for producing same
11/04/2003US6642604 An interlayer dielectric film covering the resistor layer has first and second embedded plugs providing the interconnection to reduce in temperature rise in resistor elements
11/04/2003US6642600 Insulated gate semiconductor device having first trench and second trench connected to the same
11/04/2003US6642599 Semiconductor device and method of manufacturing the same
11/04/2003US6642598 Semiconductor device
11/04/2003US6642596 Semiconductor device having trench isolation structure and method of forming same
11/04/2003US6642595 Magnetic random access memory with low writing current
11/04/2003US6642592 Semiconductor device and method for fabricating same
11/04/2003US6642591 Field-effect transistor
11/04/2003US6642590 Metal gate with PVD amorphous silicon layer and barrier layer for CMOS devices and method of making with a replacement gate process
11/04/2003US6642589 Suppressing short channel effect
11/04/2003US6642587 High density, low power consumption and reduced size
11/04/2003US6642586 Can store data of two bits in one memory cell
11/04/2003US6642585 Semiconductor device having gate electrode of stacked structure including polysilicon layer and metal layer and method of manufacturing the same
11/04/2003US6642584 Dual work function semiconductor structure with borderless contact and method of fabricating the same
11/04/2003US6642582 Circuit structure with a parasitic transistor having high threshold voltage
11/04/2003US6642581 Semiconductor device comprising buried channel region
11/04/2003US6642580 Thin film transistor array substrate and manufacturing method thereof
11/04/2003US6642579 Method of reducing the extrinsic body resistance in a silicon-on-insulator body contacted MOSFET
11/04/2003US6642575 MOS transistor with vertical columnar structure
11/04/2003US6642573 Use of high-K dielectric material in modified ONO structure for semiconductor devices
11/04/2003US6642572 Nonvolatile semiconductor memory device and method for fabricating the same
11/04/2003US6642571 Nonvolatile semiconductor memory
11/04/2003US6642570 Structure of flash memory with high coupling ratio
11/04/2003US6642569 Semiconductor memory with nonvolatile memory cell array and semiconductor device with nonvolatile memory cell array and logic device
11/04/2003US6642568 Semiconductor device and method of manufacturing the same
11/04/2003US6642567 Devices containing zirconium-platinum-containing materials and methods for preparing such materials and devices
11/04/2003US6642566 Asymmetric inside spacer for vertical transistor
11/04/2003US6642565 Coating layer of substoichiometric tungsten silicide then silicon on tungsten silicide and tempering
11/04/2003US6642564 Semiconductor memory and method for fabricating the same
11/04/2003US6642563 Eliminates deterioration problems due to hydrogen reduction and titanium oxide adhesives
11/04/2003US6642562 CMOS type solid imaging device
11/04/2003US6642560 MOSFET with a thin gate insulating film
11/04/2003US6642559 Does not increase size of monolithic microwave integrated circuit or require additional circuitry
11/04/2003US6642557 Isolated junction structure for a MOSFET
11/04/2003US6642555 Semiconductor memory device
11/04/2003US6642553 Bipolar transistor and method for producing same
11/04/2003US6642552 Inductive storage capacitor
11/04/2003US6642551 Stable high voltage semiconductor device structure
11/04/2003US6642546 Nitride based semiconductor device and method of forming the same
11/04/2003US6642540 Semiconductor integrated circuit device
11/04/2003US6642539 Epitaxial template and barrier for the integration of functional thin film metal oxide heterostructures on silicon
11/04/2003US6642536 Hybrid silicon on insulator/bulk strained silicon technology
11/04/2003US6642533 Substrate detecting method and device
11/04/2003US6642532 Methods for determining a pattern on a microlithography reticle to minimize proximity effects in pattern elements in chips located on substrate periphery
11/04/2003US6642529 Methods for the automated testing of reticle feature geometries
11/04/2003US6642528 Alignment mark detection method, and alignment method, exposure method and device, and device production method, making use of the alignment mark detection method
11/04/2003US6642525 Particle-optical component and system comprising a particle-optical component
11/04/2003US6642519 Fine pattern inspection apparatus and method and managing apparatus and method of critical dimension scanning electron microscope device
11/04/2003US6642512 Focused ion beam apparatus
11/04/2003US6642489 Method and apparatus for improving exhaust gas consumption in an exhaust conduit
11/04/2003US6642336 Photosensitive polymer
11/04/2003US6642300 Weight stability under oxygen or carbon tetrafluoride plasma irradiation
11/04/2003US6642158 Photo-thermal induced diffusion
11/04/2003US6642157 Film forming method and semiconductor device
11/04/2003US6642156 Method for forming heavy nitrogen-doped ultra thin oxynitride gate dielectrics
11/04/2003US6642155 Method for applying a fluid to a rotating silicon wafer surface
11/04/2003US6642154 Method and apparatus for fabricating structures using chemically selective endpoint detection
11/04/2003US6642153 Method for avoiding unetched polymer residue in anisotropically etched semiconductor features
11/04/2003US6642152 Method for ultra thin resist linewidth reduction using implantation
11/04/2003US6642151 Techniques for plasma etching silicon-germanium
11/04/2003US6642150 Method for testing for blind hole formed in wafer layer
11/04/2003US6642149 Plasma processing method
11/04/2003US6642148 RELACS shrink method applied for single print resist mask for LDD or buried bitline implants using chemically amplified DUV type photoresist
11/04/2003US6642147 Method of making thermally stable planarizing films
11/04/2003US6642146 Method of depositing copper seed on semiconductor substrates
11/04/2003US6642145 Method of manufacturing an integrated circuit with a dielectric diffusion barrier layer formed between interconnects and interlayer dielectric layers