Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2003
12/02/2003US6657226 Thin-film transistor array and method for manufacturing same
12/02/2003US6657225 Semiconductor component, active matrix substrate for a liquid crystal display, and methods of manufacturing such component and substrate
12/02/2003US6657223 Strained silicon MOSFET having silicon source/drain regions and method for its fabrication
12/02/2003US6657221 Image classification method, observation method, and apparatus thereof with different stage moving velocities
12/02/2003US6657215 Apparatus for determining exposure conditions, method for determining exposure conditions and process apparatus
12/02/2003US6657213 High temperature EUV source nozzle
12/02/2003US6657212 Electron beam measurement method and electron beam irradiation processing device
12/02/2003US6657211 Process for electron beam lithography, and electron-optical lithography system
12/02/2003US6657210 Electron beam exposure method, a method of constructing exposure control data, and a computer-readable medium
12/02/2003US6657209 Method and system for determining pressure compensation factors in an ion implanter
12/02/2003US6657208 Method of forming optical images, mask for use in this method, method of manufacturing a device using this method, and apparatus for carrying out this method
12/02/2003US6657207 Charged-particle-beam microlithography apparatus and methods including optical corrections made during subfield exposures
12/02/2003US6657204 Cooling of voice coil motors in lithographic projection apparatus
12/02/2003US6657203 Misalignment inspection method, charge beam exposure method, and substrate for pattern observation
12/02/2003US6657192 Method of determining degree of charge-up induced by plasma used for manufacturing semiconductor device and apparatus therefor
12/02/2003US6657154 Multicompartment containers comprising vapor deposition, excimer laser annealing, hydrogen generators, insulator formation and vacuum transfer cells for forming transistors or integrated circuits
12/02/2003US6657151 Plasma processing device
12/02/2003US6657134 Stacked ball grid array
12/02/2003US6657132 Single sided adhesive tape for compound diversion on BOC substrates
12/02/2003US6657124 Advanced electronic package
12/02/2003US6657118 Solar battery module, method of manufacturing same and power generating apparatus
12/02/2003US6657031 Curable; polyepoxide reworkable through thermal decomposition; printed circuits, semiconductors
12/02/2003US6656895 For removing a photoresist; for removing a residue of a semiconductor element generated in semiconductor treatment
12/02/2003US6656860 1x104 irradiation with argon fluoride excimer laser at energy density .1-200 mJ/cm2 middle-dot p, have a loss factor </=.0050 cm-1 at 193.4 nm, a hydrogen concentration of 1 x 1016-2 x 1018 molecules/cm3, a loss factor of </=.002 cm-1
12/02/2003US6656855 Deposition method of dielectric films having a low dielectric constant
12/02/2003US6656854 Method of forming a low dielectric constant film with tetramethylcyclotetrasiloxane (TMCTS) and LPCVD technique
12/02/2003US6656853 Enhanced deposition control in fabricating devices in a semiconductor wafer
12/02/2003US6656852 Method for the selective removal of high-k dielectrics
12/02/2003US6656851 Method for forming isolation film
12/02/2003US6656850 Method for in-situ removal of side walls in MOM capacitor formation
12/02/2003US6656849 Plasma reactor
12/02/2003US6656848 Plasma chamber conditioning
12/02/2003US6656847 Method for etching silicon nitride selective to titanium silicide
12/02/2003US6656846 Apparatus for processing samples
12/02/2003US6656845 Method for forming semiconductor substrate with convex shaped active region
12/02/2003US6656844 Method of forming a protected crown capacitor structure utilizing the outside crown surface to increase capacitance
12/02/2003US6656843 Single mask trench fred with enlarged Schottky area
12/02/2003US6656842 Barrier layer buffing after Cu CMP
12/02/2003US6656841 Method of forming multi layer conductive line in semiconductor device
12/02/2003US6656840 Method for forming silicon containing layers on a substrate
12/02/2003US6656839 Solutions of metal-comprising materials, and methods of making solutions of metal-comprising materials
12/02/2003US6656838 Process for producing semiconductor and apparatus for production
12/02/2003US6656837 Method of eliminating photoresist poisoning in damascene applications
12/02/2003US6656836 Method of performing a two stage anneal in the formation of an alloy interconnect
12/02/2003US6656835 Introducing a rhodium group metal precursor into said reactor chamber to deposit a rhodium monolayer on said substrate; and introducing oxygen into said deposition region to remove carbon from said rhodium monolayer.
12/02/2003US6656834 Method of selectively alloying interconnect regions by deposition process
12/02/2003US6656833 Method of DRAM
12/02/2003US6656832 Plasma treatment method for fabricating microelectronic fabrication having formed therein conductor layer with enhanced electrical properties
12/02/2003US6656831 Plasma-enhanced chemical vapor deposition of a metal nitride layer
12/02/2003US6656830 Dual damascene with silicon carbide middle etch stop layer/ARC
12/02/2003US6656829 Semiconductor integrated circuit device and manufacturing method of that
12/02/2003US6656828 Method of forming bump electrodes
12/02/2003US6656826 Semiconductor device with fuse to be blown with energy beam and method of manufacturing the semiconductor device
12/02/2003US6656825 Semiconductor device having an improved local interconnect structure and a method for forming such a device
12/02/2003US6656824 Low resistance T-gate MOSFET device using a damascene gate process and an innovative oxide removal etch
12/02/2003US6656823 Semiconductor device with schottky contact and method for forming the same
12/02/2003US6656822 Method for reduced capacitance interconnect system using gaseous implants into the ILD
12/02/2003US6656821 Fabricating ferroelectric memory device with photoresist and capping layer
12/02/2003US6656820 Method for manufacturing a semiconductor device having a reliable thinning step
12/02/2003US6656819 Process for producing semiconductor device
12/02/2003US6656818 Manufacturing process for semiconductor wafer comprising surface grinding and planarization or polishing
12/02/2003US6656817 Method of filling isolation trenches in a substrate
12/02/2003US6656816 Method for manufacturing semiconductor device
12/02/2003US6656815 Process for implanting a deep subcollector with self-aligned photo registration marks
12/02/2003US6656814 Methods of fabricating integrated circuit devices including distributed and isolated dummy conductive regions
12/02/2003US6656813 Low loss high Q inductor
12/02/2003US6656812 Vertical bipolar transistor having little low-frequency noise and high current gain, and corresponding fabrication process
12/02/2003US6656811 Carbide emitter mask etch stop
12/02/2003US6656810 Semiconductor device capable of reducing dispersion in electrical characteristics and operating at high speed and method for fabricating the same
12/02/2003US6656809 Method to fabricate SiGe HBTs with controlled current gain and improved breakdown voltage characteristics
12/02/2003US6656808 Transistor having variable width gate electrode and method of manufacturing the same
12/02/2003US6656807 Grooved planar DRAM transfer device using buried pocket
12/02/2003US6656806 SOI structure and method of producing same
12/02/2003US6656805 Method of reducing silicon oxynitride gate insulator thickness in some transistors of a hybrid integrated circuit to obtain increased differential in gate insulator thickness with other transistors of the hybrid circuit
12/02/2003US6656804 Semiconductor device and production method thereof
12/02/2003US6656803 Radiation hardened semiconductor memory
12/02/2003US6656802 Process of manufacturing a semiconductor device including a buried channel field effect transistor
12/02/2003US6656801 Method of fabricating a ferroelectric stacked memory cell
12/02/2003US6656800 Method of manufacturing semiconductor device including process for implanting impurities into substrate via MOS transistor gate electrode and gate insulation film
12/02/2003US6656799 Method for producing FET with source/drain region occupies a reduced area
12/02/2003US6656798 Gate processing method with reduced gate oxide corner and edge thinning
12/02/2003US6656797 High voltage power MOSFET having a voltage sustaining region that includes doped columns formed by trench etching and ion implantation
12/02/2003US6656796 Multiple etch method for fabricating split gate field effect transistor (FET) device
12/02/2003US6656795 Method of manufacturing semiconductor memory element
12/02/2003US6656794 Method of manufacturing semiconductor device including a memory area and a logic circuit area
12/02/2003US6656793 Method of forming a self-aligned floating gate in flash memory cell
12/02/2003US6656792 Nanocrystal flash memory device and manufacturing method therefor
12/02/2003US6656791 Semiconductor integrated circuit with resistor and method for fabricating thereof
12/02/2003US6656790 Method for manufacturing a semiconductor device including storage nodes of capacitor
12/02/2003US6656789 Capacitor for highly-integrated semiconductor memory devices and a method for manufacturing the same
12/02/2003US6656788 Method for manufacturing a capacitor for semiconductor devices
12/02/2003US6656787 Method for fabricating non-volatile memories
12/02/2003US6656786 MIM process for logic-based embedded RAM having front end manufacturing operation
12/02/2003US6656785 MIM process for logic-based embedded RAM
12/02/2003US6656784 Method for fabricating capacitors
12/02/2003US6656783 Semiconductor device having shallow trench isolation structure and manufacturing method thereof
12/02/2003US6656782 Process for manufacturing an isolated-gate transistor with an architecture of the substrate-on-insulator type, and corresponding transistor
12/02/2003US6656781 Method of manufacturing a semiconductor device, having first and second semiconductor regions with field shield isolation structures and a field oxide film covering a junction between semiconductor regions
12/02/2003US6656780 Method of manufacturing a semiconductor device having nitrogen ions by twice RTA processes
12/02/2003US6656779 Semiconductor apparatus having semiconductor circuits made of semiconductor devices, and method of manufacture thereof
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