Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2003
12/24/2003CA2488829A1 A method for making a ferroelectric memory cell in a ferroelectric memory device, and a ferroelectric memory device
12/23/2003USRE38363 Method of forming trench isolation having polishing step and method of manufacturing semiconductor device
12/23/2003US6668366 System and method for processing a transistor channel layout
12/23/2003US6668337 Method for designing integrated circuit based on the transaction analyzing model
12/23/2003US6668075 Position detection apparatus and method
12/23/2003US6668037 X-ray projection exposure apparatus and a device manufacturing method
12/23/2003US6667909 Method of erasing a FAMOS memory cell and a corresponding memory cell
12/23/2003US6667907 Semiconductor memory and method for applying voltage to semiconductor memory device
12/23/2003US6667904 Multi-level non-volatile semiconductor memory device with verify voltages having a smart temperature coefficient
12/23/2003US6667902 Semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric
12/23/2003US6667901 Dual-junction magnetic memory device and read method
12/23/2003US6667897 Magnetic tunnel junction containing a ferrimagnetic layer and anti-parallel layer
12/23/2003US6667895 Integrated circuit device and module with integrated circuits
12/23/2003US6667806 Process and apparatus for manufacturing semiconductor device
12/23/2003US6667665 Random number generator
12/23/2003US6667647 Low power clock distribution methodology
12/23/2003US6667627 Probe for inspecting semiconductor device and method of manufacturing the same
12/23/2003US6667626 Probe card, and testing apparatus having the same
12/23/2003US6667625 Method and apparatus for detecting wire in an ultrasonic bonding tool
12/23/2003US6667603 Semiconductor integrated circuit with different operational current modes
12/23/2003US6667559 Ball grid array module and method of manufacturing same
12/23/2003US6667558 Module and method of making same
12/23/2003US6667557 Adhesively attaching collar to support substrate and electric device
12/23/2003US6667556 Flip chip adaptor package for bare die
12/23/2003US6667554 Expanded implantation of contact holes
12/23/2003US6667553 H:SiOC coated substrates
12/23/2003US6667552 Low dielectric metal silicide lined interconnection system
12/23/2003US6667551 Semiconductor device and manufacturing thereof, including a through-hole with a wider intermediate cavity
12/23/2003US6667550 Installation structure and method for optical parts and electric parts
12/23/2003US6667546 Ball grid array semiconductor package and substrate without power ring or ground ring
12/23/2003US6667543 Optical sensor package
12/23/2003US6667542 Anisotropic conductive film-containing device
12/23/2003US6667541 Terminal land frame and method for manufacturing the same
12/23/2003US6667540 Method and apparatus for reducing fixed charge in semiconductor device layers
12/23/2003US6667538 Semiconductor device having semiconductor resistance element and fabrication method thereof
12/23/2003US6667537 Semiconductor devices including resistance elements and fuse elements
12/23/2003US6667536 Thin film multi-layer high Q transformer formed in a semiconductor substrate
12/23/2003US6667531 Method and apparatus for a deposited fill layer
12/23/2003US6667530 Semiconductor device and manufacturing method thereof
12/23/2003US6667526 Tunneling magnetoresistive storage unit
12/23/2003US6667525 Semiconductor device having hetero grain stack gate
12/23/2003US6667524 Semiconductor device with a plurality of semiconductor elements
12/23/2003US6667523 Highly linear integrated resistive contact
12/23/2003US6667522 Silicon wafers for CMOS and other integrated circuits
12/23/2003US6667521 Bipolar transistor with raised extrinsic base fabricated in an integrated BiCMOS circuit
12/23/2003US6667519 Mixed technology microcircuits
12/23/2003US6667518 Method and semiconductor structure for implementing buried dual rail power distribution and integrated decoupling capacitance for silicon on insulator (SOI) devices
12/23/2003US6667517 Electrooptical device and electronic device
12/23/2003US6667516 RF LDMOS on partial SOI substrate
12/23/2003US6667514 Semiconductor component with a charge compensation structure and associated fabrication
12/23/2003US6667513 Semiconductor device with compensated threshold voltage and method for making same
12/23/2003US6667512 Asymmetric retrograde halo metal-oxide-semiconductor field-effect transistor (MOSFET)
12/23/2003US6667511 NAND type core cell structure for a high density flash memory device having a unique select gate transistor configuration
12/23/2003US6667510 Self-aligned split-gate flash memory cell and its contactless memory array
12/23/2003US6667509 Method of forming sharp beak of poly by oxygen/fluorine implant to improve erase speed for split-gate flash
12/23/2003US6667508 Nonvolatile memory having a split gate
12/23/2003US6667507 Flash memory having memory section and peripheral circuit section
12/23/2003US6667506 Variable capacitor with programmability
12/23/2003US6667505 Semiconductor device having a plurality of capacitors aligned at regular intervals
12/23/2003US6667504 Self-aligned buried strap process using doped HDP oxide
12/23/2003US6667503 Semiconductor trench capacitor
12/23/2003US6667502 Structurally-stabilized capacitors and method of making of same
12/23/2003US6667501 Nonvolatile memory and method for driving nonvolatile memory
12/23/2003US6667498 Nitride semiconductor stack and its semiconductor device
12/23/2003US6667495 Silicon carbide having first and second dopes
12/23/2003US6667494 Semiconductor device and semiconductor display device
12/23/2003US6667492 Quantum ridges and tips
12/23/2003US6667491 Semiconductor device
12/23/2003US6667489 Heterojunction bipolar transistor and method for production thereof
12/23/2003US6667486 Electron beam exposure method, electron beam exposure apparatus and device manufacturing method using the same
12/23/2003US6667485 Ion implanting apparatus and sample processing apparatus
12/23/2003US6667484 Radiation source, lithographic apparatus, device manufacturing method, and device manufactured thereby
12/23/2003US6667483 Apparatus using charged particle beam
12/23/2003US6667439 Integrated circuit package including opening exposing portion of an IC
12/23/2003US6667264 Silicon nitride sintered material and process for production thereof
12/23/2003US6667253 Alignment mark and exposure alignment system and method using the same
12/23/2003US6667252 Method of manufacturing compound semiconductor substrate
12/23/2003US6667251 Plasma nitridation for reduced leakage gate dielectric layers
12/23/2003US6667250 Film substrate treatment apparatus, film substrate treatment method, and film substrate transport method
12/23/2003US6667249 Minimizing coating defects in low dielectric constant films
12/23/2003US6667248 Low-bias-deposited high-density-plasma chemical-vapor-deposition silicate glass layers
12/23/2003US6667246 Wet-etching method and method for manufacturing semiconductor device
12/23/2003US6667244 Method for etching sidewall polymer and other residues from the surface of semiconductor devices
12/23/2003US6667243 Etch damage repair with thermal annealing
12/23/2003US6667242 Brim and gas escape for non-contact wafer holder
12/23/2003US6667239 Chemical mechanical polishing of copper-oxide damascene structures
12/23/2003US6667238 Polishing method and apparatus
12/23/2003US6667237 Method and apparatus for patterning fine dimensions
12/23/2003US6667236 Method of manufacturing a two layer liner for dual damascene vias
12/23/2003US6667235 Semiconductor device and manufacturing method therefor
12/23/2003US6667234 Method of fabricating node contacts
12/23/2003US6667233 Method for forming a silicide layer of semiconductor device
12/23/2003US6667232 Thin dielectric layers and non-thermal formation thereof
12/23/2003US6667231 Method of forming barrier films for copper metallization over low dielectric constant insulators in an integrated circuit
12/23/2003US6667230 Passivation and planarization process for flip chip packages
12/23/2003US6667229 Method of connecting a bumped compliant conductive trace and an insulative base to a semiconductor chip
12/23/2003US6667228 Method for fabricating cell plugs of semiconductor device
12/23/2003US6667227 Trenched gate metal oxide semiconductor device and method
12/23/2003US6667226 Method and system for integrating shallow trench and deep trench isolation structures in a semiconductor device
12/23/2003US6667225 Wafer-bonding using solder and method of making the same
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