Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2003
12/18/2003WO2003105192A2 Apparatus and method for cassette-less transfer of wafers
12/18/2003WO2003105191A2 Subpad having robust, sealed edges
12/18/2003WO2003105190A2 System and method for hydrogen-rich selective oxidation
12/18/2003WO2003105189A2 Strained-semiconductor-on-insulator device structures
12/18/2003WO2003105187A2 Optimization methods for on-chip interconnect geometries suitable for ultra deep sub-micron processes
12/18/2003WO2003105113A1 Electro-optical device manufacturing method, electro-optical device manufactured by the manufacturing method, and electronic device
12/18/2003WO2003104929A2 Use of overlay diagnostics for enhanced automatic process control
12/18/2003WO2003104921A2 Characterization adn reduction of variation for integrated circuits
12/18/2003WO2003104901A2 Microelectronic cleaning and arc remover compositions
12/18/2003WO2003104900A2 Microelectronic cleaning compositions containing oxidizers and organic solvents
12/18/2003WO2003104896A2 Photomask and method for repairing defects
12/18/2003WO2003104883A1 Semiconductor device, reflection type liquid crystal display device, and reflection type liquid crystal projector
12/18/2003WO2003104784A1 A cantilever sensor with a current shield and a method for its production
12/18/2003WO2003104781A1 Method for pattern inspection
12/18/2003WO2003104524A1 Processing device and processing method
12/18/2003WO2003104351A1 Metal oxide powder for high precision polishing and method of preparation thereof
12/18/2003WO2003104350A1 Metal polish composition, polishing method using the composition and method for producing wafer using the polishing method
12/18/2003WO2003104344A1 Abrasive particles to clean semiconductor wafers during chemical mechanical planarization
12/18/2003WO2003104343A2 Method for chemical mechanical polishing (cmp) of low-k dielectric materials
12/18/2003WO2003104305A1 Organic silicate polymer and insulation film comprising the same
12/18/2003WO2003104185A1 Semiconductor process residue removal composition and process
12/18/2003WO2003103898A1 Residual film monitoring device, polishing device, method for manufacturing semiconductor device, and semiconductor device
12/18/2003WO2003103845A1 Nozzle device and substrate processing device with the nozzle device
12/18/2003WO2003090253A3 Single axis manipulator with controlled compliance
12/18/2003WO2003088321A3 Device and method for positioning a plate-type substrate
12/18/2003WO2003087867A3 Extreme ultraviolet light source
12/18/2003WO2003087710A3 Method and apparatus for stage mirror mapping
12/18/2003WO2003085721A3 Variable temperature processes for tunable electrostatic chuck
12/18/2003WO2003081633A3 Tandem etch chamber plasma processing system
12/18/2003WO2003080893B1 Method for coating a substrate and device for carrying out the method
12/18/2003WO2003079417A3 Mim capacitor with metal nitride electrode materials and method of formation
12/18/2003WO2003079413A3 High k dielectric film and method for making
12/18/2003WO2003079411A3 Use of light emitting chemical reactions for control of semiconductor production processes
12/18/2003WO2003079405A3 Method for forming thin film layers by simultaneous doping and sintering
12/18/2003WO2003078677A3 Device for targeted application of deposition material to a substrate
12/18/2003WO2003077322A3 H-bridge with single lead frame
12/18/2003WO2003075337A8 Fluxless assembly of chip size semiconductor packages
12/18/2003WO2003073169A3 Fluorinated molecules and methods of making and using same
12/18/2003WO2003073164A3 Novel planarization method for multi-layer lithography processing
12/18/2003WO2003065418A3 Planar avalanche photodiode
12/18/2003WO2003058682A3 A METHOD FOR FORMING A POWER SEMICONDUCTOR AS IN FIGURE 5 HAVING A SUBSTRATE (2), A VOLTAGE SUSTAINING EPITAXIAL LAYER (1) WITH AT LEAST A TRENCH (52), A DOPED REGION (5a) ADJACENT AND SURROUNDING THE TRENCH.
12/18/2003WO2003054955A3 Silicon substrate having an insulating layer with partial regions and a corresponding assembly
12/18/2003WO2003050876A3 Self aligned compact bipolar junction transistor layout, and method of making same
12/18/2003WO2003050854A3 Chemical reactor templates: sacrificial layer fabrication and template use
12/18/2003WO2003049160A3 Method of producing integrated semiconductor components on a semiconductor substrate
12/18/2003WO2003046663A3 Characterization of the illumination angle distribution of a projection lighting system
12/18/2003WO2003038890A3 Method for planarization etch with in-situ monitoring by interferometry prior to recess etch
12/18/2003WO2003032373A3 Semiconductor device identification apparatus
12/18/2003WO2003028098A3 Programmable chip-to-substrate interconnect structure and device and method of forming same
12/18/2003WO2003025979A3 Method for automatic optical measurement of an opc structure
12/18/2003WO2003019640A3 Method of forming a thin layer and a contact outlet
12/18/2003WO2003019622A3 System and method of fast ambient switching for rapid thermal processing
12/18/2003WO2003018866A9 Protective shield and system for gas distribution
12/18/2003WO2003017335A3 Systems for wafer level burn-in of electronic devices
12/18/2003WO2003014812A3 Semiconductor structures and polarization modulator devices
12/18/2003WO2003010086A3 Microelectromechanical system devices integrated with semiconductor structures
12/18/2003WO2003009361A3 Planar metal electroprocessing
12/18/2003WO2003007440A3 Integrated light source for frequency adjustment
12/18/2003WO2003007346A3 Clean method and apparatus for vacuum holding of substrates
12/18/2003WO2003006205A3 Barrier removal at low polish pressure
12/18/2003WO2003003447A3 System and method for active control of spacer deposition
12/18/2003WO2003003446A3 Control of solid state dimensional features
12/18/2003WO2003003416A3 Method and apparatus for accessing a multiple chamber semiconductor wafer processing system
12/18/2003WO2002103582B1 Method and system for design selection by interactive visualization
12/18/2003WO2002101600A3 Method for generating design constraints for modulates in a hierarchical integrated circuit design system
12/18/2003WO2002086947A3 A method for making a metal-insulator-metal capacitor using plate-through mask techniques
12/18/2003WO2002086723A3 Emulator with switching network connections
12/18/2003WO2002079887A3 Apparatus and methods with resolution enhancement feature for improving accuracy of conversion of required chemical mechanical polishing pressure to force to be applied by polishing head to wafer
12/18/2003WO2002078078A3 Dispensing process for fabrication of microelectronic packages
12/18/2003WO2002075926B1 Antifuse reroute of dies
12/18/2003WO2002069381A3 Method of fabricating low-dielectric constant interlevel dielectric films for beol interconnects with enhanced adhesion and low-defect density
12/18/2003WO2002065542B1 Underfill compositions
12/18/2003WO2002063661A3 Method and apparatus for removal of surface contaminants from substrates in vacuum applications
12/18/2003US20030233629 Mask manufacturing method
12/18/2003US20030233627 Method of forming tree structure type circuit, and computer product
12/18/2003US20030233193 Simulation method and apparatus, and computer-readable storage medium
12/18/2003US20030232581 Surface planarization equipment for use in the manufacturing of semiconductor devices
12/18/2003US20030232580 Method of machining silicon wafer
12/18/2003US20030232576 Apparatus for polishing a substrate
12/18/2003US20030232519 Socket structure for grid array (GA) packages
12/18/2003US20030232514 Method for forming a thin film using an atomic layer deposition (ALD) process
12/18/2003US20030232513 Plasma method and apparatus for processing a substrate
12/18/2003US20030232512 Substrate processing apparatus and related systems and methods
12/18/2003US20030232511 ALD metal oxide deposition process using direct oxidation
12/18/2003US20030232510 Dielectric film
12/18/2003US20030232509 Method for reducing pitch
12/18/2003US20030232508 Single chip pad oxide layer growth process
12/18/2003US20030232507 Method for fabricating a semiconductor device having an ONO film
12/18/2003US20030232506 System and method for forming a gate dielectric
12/18/2003US20030232505 Method for patterning a layer of silicon, and method for fabricating an integrated semiconductor circuit
12/18/2003US20030232504 Process for etching dielectric films with improved resist and/or etch profile characteristics
12/18/2003US20030232503 Method for manufacturing semiconductor device
12/18/2003US20030232502 Method of manufacturing semiconductor device
12/18/2003US20030232501 Surface pre-treatment for enhancement of nucleation of high dielectric constant materials
12/18/2003US20030232500 Photo-assisted method for semiconductor fabrication
12/18/2003US20030232499 Method of making a semiconductor device that includes a dual damascene interconnect
12/18/2003US20030232498 Method for forming wiring structure
12/18/2003US20030232497 System and method for forming an integrated barrier layer
12/18/2003US20030232496 Method for forming an electrical interconnection providing improved surface morphology of tungsten
12/18/2003US20030232495 Methods and apparatus for E-beam treatment used to fabricate integrated circuit devices
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