Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2004
03/30/2004US6713379 Method for forming a damascene structure
03/30/2004US6713378 Interconnect line selectively isolated from an underlying contact plug
03/30/2004US6713377 Method of electroless plating copper on nitride barrier
03/30/2004US6713376 Method of manufacturing a contract element and a multi-layered wiring substrate, and wafer batch contact board
03/30/2004US6713374 Interconnect assemblies and methods
03/30/2004US6713373 Method for obtaining adhesion for device manufacture
03/30/2004US6713372 Method for manufacturing synchronous DRAM device
03/30/2004US6713371 Large grain size polysilicon films formed by nuclei-induced solid phase crystallization
03/30/2004US6713370 Process for the preparation of an ideal oxygen precipitating silicon wafer capable of forming an enhanced denuded zone
03/30/2004US6713368 Etching mask and magnetic head device
03/30/2004US6713366 Method of thinning a wafer utilizing a laminated reinforcing layer over the device side
03/30/2004US6713365 Methods for filling shallow trench isolations having high aspect ratios
03/30/2004US6713364 Method for forming an insulator having a low dielectric constant on a semiconductor substrate
03/30/2004US6713363 Method for fabricating capacitor of semiconductor device
03/30/2004US6713362 Method for forming a resistor to replace a N-well resistor
03/30/2004US6713361 Method of manufacturing a bipolar junction transistor including undercutting regions adjacent to the emitter region to enlarge the emitter region
03/30/2004US6713360 System for reducing segregation and diffusion of halo implants into highly doped regions
03/30/2004US6713359 Semiconductor device and method of manufacturing the same including raised source/drain comprising SiGe or SiC
03/30/2004US6713358 Method for making a semiconductor device having a high-k gate dielectric
03/30/2004US6713357 Method to reduce parasitic capacitance of MOS transistors
03/30/2004US6713356 Method for making a semiconductor device comprising a stack alternately consisting of silicon layers and dielectric material layers
03/30/2004US6713355 Semiconductor processing method
03/30/2004US6713354 Coding method for mask ROM
03/30/2004US6713353 Method of manufacturing a semiconductor integrated circuit device
03/30/2004US6713352 Method of forming a trench MOSFET with structure having increased cell density and low gate charge
03/30/2004US6713351 Double diffused field effect transistor having reduced on-resistance
03/30/2004US6713350 Method to remove an oxide seam along gate stack edge, when nitride space formation begins with an oxide liner surrounding gate stack
03/30/2004US6713349 Method for fabricating a split gate flash memory cell
03/30/2004US6713348 Method for forming an etch mask during the manufacture of a semiconductor device
03/30/2004US6713347 Process for integrating in a same chip a non-volatile memory and a high-performance logic circuitry
03/30/2004US6713346 Methods of forming a line of flash memory cells
03/30/2004US6713345 Semiconductor memory device having a trench and a gate electrode vertically formed on a wall of the trench
03/30/2004US6713344 Semiconductor device and method for manufacturing the same
03/30/2004US6713343 Method of forming a semiconductor device with a capacitor including a polycrystalline tantalum oxide film dielectric
03/30/2004US6713342 FeRAM sidewall diffusion barrier etch
03/30/2004US6713341 Method of forming a bottle-shaped trench in a semiconductor substrate
03/30/2004US6713340 Method for fabricating a memory device
03/30/2004US6713339 Methods of forming switchable circuit devices
03/30/2004US6713338 Method for fabricating source/drain devices
03/30/2004US6713337 Method for manufacturing a semiconductor device having self-aligned contacts
03/30/2004US6713336 Flash memory device and method for fabricating the same
03/30/2004US6713335 Method of self-aligning a damascene gate structure to isolation regions
03/30/2004US6713334 Fabricating dual voltage CMOSFETs using additional implant into core at high voltage mask
03/30/2004US6713333 Method for fabricating a MOSFET
03/30/2004US6713332 Non-volatile memory device with enlarged trapping layer
03/30/2004US6713331 Semiconductor device manufacturing using one element separation film
03/30/2004US6713330 Method of fabricating a thin film transistor
03/30/2004US6713329 Inverter made of complementary p and n channel transistors using a single directly-deposited microcrystalline silicon film
03/30/2004US6713328 Manufacturing method of thin film transistor panel
03/30/2004US6713327 Stress controlled dielectric integrated circuit fabrication
03/30/2004US6713326 Process for producing semiconductor article using graded epitaxial growth
03/30/2004US6713325 Method of manufacturing a semiconductor integrated circuit and semiconductor integrated circuit
03/30/2004US6713324 Display device and a method for manufacturing the same
03/30/2004US6713323 Semiconductor device and method of manufacturing the same
03/30/2004US6713321 Super low profile package with high efficiency of heat dissipation
03/30/2004US6713320 Bumping process
03/30/2004US6713319 Method for fabricating a semiconductor apparatus including a sealing member with reduced thermal stress
03/30/2004US6713318 Flip chip interconnection using no-clean flux
03/30/2004US6713316 Method for removing foreign matter, method for forming film, semiconductor device and film forming apparatus
03/30/2004US6713315 Mask read-only memory and fabrication thereof
03/30/2004US6713314 Hermetically packaging a microelectromechanical switch and a film bulk acoustic resonator
03/30/2004US6713310 Ferroelectric memory device using via etch-stop layer and method for manufacturing the same
03/30/2004US6713298 Device for detecting particles in fluid
03/30/2004US6713235 On top of supports on a base spaced away
03/30/2004US6713234 Fabrication of semiconductor devices using anti-reflective coatings
03/30/2004US6713232 Using acidic aqueous solution
03/30/2004US6713231 Method of manufacturing semiconductor integrated circuit devices
03/30/2004US6713229 May be exposed to light using arf lasers, may have strong resistances to dry etching processes, may possess excellent adhesion to film materials, and may be developed using conventional developers
03/30/2004US6713228 Unsaturated ether containing polymer
03/30/2004US6713199 Plurality of separate layers, each having a thickness of less than 500 angstrom , and based on hafnium dioxide (hfo2), zirconium dioxide (zro2) and alumina (al2o3). in practice, the hafnium dioxide, zirconium dioxide and alumina layers form
03/30/2004US6713134 Apparatus for spin-coating semiconductor substrate and method of doing the same
03/30/2004US6713127 Methods for silicon oxide and oxynitride deposition using single wafer low pressure CVD
03/30/2004US6713122 Methods and apparatus for airflow and heat management in electroless plating
03/30/2004US6713120 Substrate processing system and substrate processing method
03/30/2004US6712983 Method of etching a deep trench in a substrate and method of fabricating on-chip devices and micro-machined structures using the same
03/30/2004US6712956 Apparatus for monitoring discharge of photoresist
03/30/2004US6712929 Deformation reduction at the main chamber
03/30/2004US6712928 Method and its apparatus for detecting floating particles in a plasma processing chamber and an apparatus for processing a semiconductor device
03/30/2004US6712927 Chamber having process monitoring window
03/30/2004US6712926 Recycling apparatus
03/30/2004US6712909 Substrate processing apparatus and method for manufacturing semiconductor device
03/30/2004US6712908 Purified silicon production system
03/30/2004US6712907 Magnetically coupled linear servo-drive mechanism
03/30/2004US6712903 Mask for evaluating selective epitaxial growth process
03/30/2004US6712676 Methods and apparatuses for mechanical and chemical-mechanical planarization of microelectronic-device substrate assemblies on planarizing pads
03/30/2004US6712674 Polishing apparatus and polishing method
03/30/2004US6712670 Method and apparatus for applying downward force on wafer during CMP
03/30/2004US6712579 Substrate transfer apparatus and substrate transfer method
03/30/2004US6712577 Automated semiconductor processing system
03/30/2004US6712320 Single-handed cord/cable management device
03/30/2004US6712288 Method and apparatus for separating sample
03/30/2004US6712284 High frequency semiconductor device
03/30/2004US6712265 System and method for interlocking management in semiconductor material supply equipment
03/30/2004US6712261 Solid conductive element insertion apparatus
03/30/2004US6712260 Bump reflow method by inert gas plasma
03/30/2004US6712258 Integrated quantum cold point coolers
03/30/2004US6712213 Wafer carrier door and latching mechanism withhourglass shaped key slot
03/30/2004US6712132 Piezoelectric wafer clamping system
03/30/2004US6712111 Bonding method and apparatus
03/30/2004US6712110 Apparatus for attaching resists and wafers to substrates