Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2004
03/30/2004US6714030 For measuring electrical characteristics during semiconductor manufacture processes such as probing inspection and burn-in inspection
03/30/2004US6713968 Plasma processing apparatus
03/30/2004US6713900 Linear motors and stages comprising same that produce reduced magnetic fields at an optical axis for charged-particle-beam lithography
03/30/2004US6713886 Semiconductor device
03/30/2004US6713884 Method of forming an alignment mark structure using standard process steps for forming vertical gate transistors
03/30/2004US6713882 Resin sealing apparatus and resin sealing method
03/30/2004US6713881 Increased wire connection strength with respect to the pads
03/30/2004US6713880 Semiconductor device and method for producing the same, and method for mounting semiconductor device
03/30/2004US6713878 Electronic element with a shielding
03/30/2004US6713875 Barrier layer associated with a conductor layer in damascene structures
03/30/2004US6713874 Semiconductor devices with dual nature capping/arc layers on organic-doped silica glass inter-layer dielectrics
03/30/2004US6713873 Adhesion between dielectric materials
03/30/2004US6713872 Multilayered semiconductor device
03/30/2004US6713871 A simple current loop is created that improves the power delivery for the system
03/30/2004US6713869 Wiring pattern of semiconductor device
03/30/2004US6713866 Cooling of optoelectronic elements
03/30/2004US6713861 Method of removing free halogen from a halogenated polymer insulating layer of a semiconductor device and resulting semiconductor device
03/30/2004US6713859 Direct build-up layer on an encapsulated die package having a moisture barrier structure
03/30/2004US6713858 Flip-chip package with optimized encapsulant adhesion and method
03/30/2004US6713857 Low profile stacked multi-chip semiconductor package with chip carrier having opening and fabrication method of the semiconductor package
03/30/2004US6713851 Lead over chip semiconductor device including a heat sink for heat dissipation
03/30/2004US6713849 Semiconductor utilizing grooves in lead and tab portions of lead frame to prevent peel off between the lead frame and the resin
03/30/2004US6713847 Method of fabricating semiconductor device, and semiconductor device
03/30/2004US6713846 Multilayer high κ dielectric films
03/30/2004US6713845 Nitride-based semiconductor element
03/30/2004US6713844 Semiconductor-chip mounting substrate having at least one projection thereon and a pressure holding means
03/30/2004US6713842 Mask for and method of forming a character on a substrate
03/30/2004US6713840 Metal-insulator-metal device structure inserted into a low k material and the method for making same
03/30/2004US6713837 Semiconductor device with fuse
03/30/2004US6713835 Introducing isotropic etchant through the passageway that selectively etches and removes mandrel material, filling structure with air as low-k dielectric
03/30/2004US6713834 Semiconductor device having two-layered charge storage electrode
03/30/2004US6713830 Magnetoresistive element, memory element using the magnetoresistive element, and recording/reproduction method for the memory element
03/30/2004US6713826 Method for fabricating a semiconductor device having contacts self-aligned with a gate electrode thereof
03/30/2004US6713825 Poly-crystalline thin film transistor and fabrication method thereof
03/30/2004US6713824 Reliable semiconductor device and method of manufacturing the same
03/30/2004US6713822 Semiconductor device
03/30/2004US6713821 Structure of a mask ROM device
03/30/2004US6713820 Semiconductor device
03/30/2004US6713819 SOI MOSFET having amorphized source drain and method of fabrication
03/30/2004US6713818 Electrostatic discharge protection device
03/30/2004US6713817 Semiconductor integrated circuit system
03/30/2004US6713815 Semiconductor device with transistors that convert a voltage difference into a drain current difference
03/30/2004US6713813 Field effect transistor having a lateral depletion structure
03/30/2004US6713812 Non-volatile memory device having an anti-punch through (APT) region
03/30/2004US6713811 Split gate flash with strong source side injection and method of fabrication thereof
03/30/2004US6713810 Non-volatile devices, and electronic systems comprising non-volatile devices
03/30/2004US6713809 Dual bit memory device with isolated polysilicon floating gates
03/30/2004US6713808 Semiconductor capacitor with diffusion prevention layer
03/30/2004US6713807 Films doped with carbon for use in integrated circuit technology
03/30/2004US6713806 Method for manufacturing an extended-wing capacitor and the extended-wing capacitor
03/30/2004US6713805 Semiconductor memory device with increased capacitance
03/30/2004US6713804 TFT with a negative substrate bias that decreases in time
03/30/2004US6713802 Magnetic tunnel junction patterning using SiC or SiN
03/30/2004US6713799 Electrodes for ferroelectric components
03/30/2004US6713798 Semiconductor device having a capacitor and method of manufacturing the same
03/30/2004US6713797 Textured Bi-based oxide ceramic films
03/30/2004US6713794 Lateral semiconductor device
03/30/2004US6713790 Semiconductor device and method for fabricating the same
03/30/2004US6713789 Group III nitride compound semiconductor device and method of producing the same
03/30/2004US6713785 Thin film transistor and display device having the same
03/30/2004US6713782 Polishing of conductive layers in fabrication of integrated circuits
03/30/2004US6713780 Process using poly-buffered STI
03/30/2004US6713779 Semiconductor device and method of manufacturing the same
03/30/2004US6713759 Apparatus and method for secondary electron emission microscope
03/30/2004US6713748 Image detection device
03/30/2004US6713747 Light exposure apparatus
03/30/2004US6713720 Method for cutting a non-metallic substrate
03/30/2004US6713714 Method and device for thermally connecting the contact surfaces of two substrates
03/30/2004US6713677 Housing assembly for an electronic device and method of packaging an electronic device
03/30/2004US6713587 Such as cationic tetrabromobisphenol a-diethylene glycol-diethanolamine resin and curing agent; flame resistance protective layer; circuit board fabrication
03/30/2004US6713440 Resist and etching by-product removing composition and resist removing method using the same
03/30/2004US6713409 Semiconductor manufacturing using modular substrates
03/30/2004US6713408 Method of producing silica micro-structures from x-ray lithography of SOG materials
03/30/2004US6713407 Method of forming a metal nitride layer over exposed copper
03/30/2004US6713406 Method for depositing dielectric materials onto semiconductor substrates by HDP (high density plasma) CVD (chemical vapor deposition) processes without damage to FET active devices
03/30/2004US6713405 Substrate processing apparatus and substrate processing method
03/30/2004US6713404 Methods of forming semiconductor constructions
03/30/2004US6713403 Method for manufacturing semiconductor device
03/30/2004US6713402 Methods for polymer removal following etch-stop layer etch
03/30/2004US6713401 Method for manufacturing semiconductor device
03/30/2004US6713400 Method for improving the stability of amorphous silicon
03/30/2004US6713398 Method of planarizing polysillicon plug
03/30/2004US6713397 Manufacturing method of semiconductor device
03/30/2004US6713396 Method of fabricating high density sub-lithographic features on a substrate
03/30/2004US6713395 Single RIE process for MIMcap top and bottom plates
03/30/2004US6713394 Process for planarization of integrated circuit structure which inhibits cracking of low dielectric constant dielectric material adjacent underlying raised structures
03/30/2004US6713393 Method of forming a nanometer-gate MOSFET device
03/30/2004US6713392 Nitrogen oxide plasma treatment for reduced nickel silicide bridging
03/30/2004US6713391 Physical vapor deposition targets
03/30/2004US6713390 Barrier layer deposition using HDP-CVD
03/30/2004US6713389 Method of forming an electronic device
03/30/2004US6713388 Method of fabricating a non-volatile memory device to eliminate charge loss
03/30/2004US6713387 Method for forming contact plug in semiconductor device
03/30/2004US6713386 Method of preventing resist poisoning in dual damascene structures
03/30/2004US6713385 Implanting ions in shallow trench isolation structures
03/30/2004US6713384 Contact integration method
03/30/2004US6713383 Semiconductor device manufacturing method
03/30/2004US6713382 Vapor treatment for repairing damage of low-k dielectric
03/30/2004US6713381 Method of forming semiconductor device including interconnect barrier layers
03/30/2004US6713380 Methods for dry etching at low substrate temperatures using gas chemistry including a fluorocarbon gas and a gas including oxygen