Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2013
11/14/2013WO2013166974A1 Method for producing mrom memory based on opt memory
11/14/2013WO2013166956A1 Test method for dynamic breakdown voltage of silicon on insulator mos device
11/14/2013WO2013166927A1 Self-adaptive composite mechanism tunneling field effect transistor, and manufacturing method thereof
11/14/2013WO2013166831A1 Thin-film transistor array substrate and fabrication method and display device
11/14/2013WO2013166733A1 Finfet and manufacturing method thereof
11/14/2013WO2013166706A1 Device and method for cleaning components of a wave soldering apparatus
11/14/2013WO2013166668A1 Thin film transistor array substrate and manufacturing method thereof
11/14/2013WO2013166641A1 Semiconductor die laminating device with independent drives
11/14/2013WO2013166632A1 Semiconductor component and manufacturing method therefor
11/14/2013WO2013166631A1 Method for manufacturing semiconductor component
11/14/2013WO2013166630A1 Semiconductor device fabrication method
11/14/2013WO2013064613A3 Cvd-reactor and substrate holder for a cvd reactor
11/14/2013WO2012171726A3 Copper filled opening with a cap layer
11/14/2013US20130304419 Abnormality determination system and abnormality determination method for processing apparatus
11/14/2013US20130304408 Measurement Recipe Optimization Based On Spectral Sensitivity And Process Variation
11/14/2013US20130303739 Preparation of lanthanide-containing precursors and deposition of lanthanide-containing films
11/14/2013US20130302999 Siox process chemistry development using microwave plasma cvd
11/14/2013US20130302998 Adhesion Layer for Solution-Processed Transition Metal Oxides on Inert Metal Contacts
11/14/2013US20130302997 Preparation of Epitaxial Graphene Surfaces for Atomic Layer Deposition of Dielectrics
11/14/2013US20130302996 Deposition of an amorphous carbon layer with high film density and high etch selectivity
11/14/2013US20130302995 Methods Of Treating Semiconductor Substrates, Methods Of Forming Openings During Semiconductor Fabrication, And Methods Of Removing Particles From Over Semiconductor Substrates
11/14/2013US20130302994 Substrate carrier having drip edge configurations
11/14/2013US20130302993 Semiconductor device manufacturing method and plasma etching apparatus
11/14/2013US20130302991 Composition for forming resist underlayer film, containing silicon that bears diketone-structure-containing organic group
11/14/2013US20130302990 Organic film composition, method for forming organic film and patterning process using this, and heat-decomposable polymer
11/14/2013US20130302989 Reducing line edge roughness in hardmask integration schemes
11/14/2013US20130302988 Etching method using an at least semi-solid media
11/14/2013US20130302987 Mask material conversion
11/14/2013US20130302986 Method for defining a separating structure within a semiconductor device
11/14/2013US20130302985 Method of removing residue during semiconductor device fabrication
11/14/2013US20130302984 Polishing composition, polishing method using same, and substrate production method
11/14/2013US20130302983 Temporary adhesive for wafer processing, member for wafer processing using the same, wafer processed body, and method for producing thin wafer
11/14/2013US20130302982 Deposition method using a substrate carrier
11/14/2013US20130302981 Semiconductor Constructions And Methods Of Forming Patterns
11/14/2013US20130302980 Tungsten feature fill
11/14/2013US20130302979 Method of manufacturing a semiconductor device including through silicon plugs
11/14/2013US20130302978 Method of forming a graphene cap for copper interconnect structures
11/14/2013US20130302976 Method of forming semiconductor device
11/14/2013US20130302975 Fin Profile Structure and Method of Making Same
11/14/2013US20130302974 Replacement gate electrode fill at reduced temperatures
11/14/2013US20130302973 Horizontal epitaxy furnace for channel sige formation
11/14/2013US20130302972 High quality gan high-voltage hfets on silicon
11/14/2013US20130302971 Material sheet handling system and processing methods
11/14/2013US20130302970 A method of high temperature layer transfer
11/14/2013US20130302969 Wafer processing method
11/14/2013US20130302968 Memory device and method for manufacturing memory device
11/14/2013US20130302967 Semiconductor device with sti and method for manufacturing the semiconductor device
11/14/2013US20130302963 Graphene transistors with self-aligned gates
11/14/2013US20130302961 Method for improving transistor performance through reducing the salicide interface resistance
11/14/2013US20130302958 Method of making an insulated gate semiconductor device having a shield electrode structure
11/14/2013US20130302956 Methods of Forming Semiconductor Devices with Embedded Semiconductor Material as Source/Drain Regions Using a Reduced Number of Spacers
11/14/2013US20130302954 Methods of forming fins for a finfet device without performing a cmp process
11/14/2013US20130302952 Method for manufacturing a semiconductor device
11/14/2013US20130302949 Buried-channel field-effect transistors
11/14/2013US20130302948 3d array with vertical transistor
11/14/2013US20130302947 Packaging method
11/14/2013US20130302946 Multi-layer lead frame package and method of fabrication
11/14/2013US20130302945 Singulation of ic packages
11/14/2013US20130302944 Methods of manufacturing semiconductor devices including terminals with internal routing interconnections
11/14/2013US20130302943 Dual-side interconnected cmos for stacked integrated circuits
11/14/2013US20130302940 Graphene Channel-Based Devices and Methods for Fabrication Thereof
11/14/2013US20130302937 Film Formation Apparatus, Method for Forming Film, Method for Forming Multilayer Film or Light-Emitting Element, and Method for Cleaning Shadow Mask
11/14/2013US20130302935 Self-assembly apparatus, device self-assembling method, and method of assembling thermoelectric devices
11/14/2013US20130302926 Method for fabricating semiconductor dice by separating a substrate from semiconductor structures using multiple laser pulses
11/14/2013US20130302918 Plasma processing apparatus and plasma processing method
11/14/2013US20130302917 Method for lower thermal budget multiple cures in semiconductor packaging
11/14/2013US20130302916 Methods and apparatuses for high pressure gas annealing
11/14/2013US20130302915 Thin film transistor array panel, liquid crystal display, method for repairing the same, color filter array panel and method for manufacturing the same
11/14/2013US20130302912 Method to Reduce Magnetic Film Stress for Better Yield
11/14/2013US20130302209 High Efficiency Solid-State Light Source and Methods of Use and Manufacture
11/14/2013US20130302134 Substrate centering device and organic material deposition system
11/14/2013US20130302115 Vacuum processing apparatus
11/14/2013US20130301975 Hybrid optical modulator
11/14/2013US20130301017 Lithographic apparatus and device manufacturing method
11/14/2013US20130300004 Semiconductor Device and Method of Controlling Warpage in Semiconductor Package
11/14/2013US20130300003 Enhanced Hydrogen Barrier Encapsulation Method for the Control of Hydrogen Induced Degradation of Ferroelectric Capacitors in an F-RAM Process
11/14/2013US20130299998 Semiconductor Device and Method of Forming Guard Ring Around Conductive TSV Through Semiconductor Wafer
11/14/2013US20130299996 Method of making an electrode contact structure and structure therefor
11/14/2013US20130299995 Semiconductor Device and Method of Depositing Underfill Material With Uniform Flow Rate
11/14/2013US20130299994 Integrated circuits and processes for forming integrated circuits having an embedded electrical interconnect within a substrate
11/14/2013US20130299993 Interconnection of semiconductor device and fabrication method thereof
11/14/2013US20130299990 Single metal damascene structure and method of forming the same
11/14/2013US20130299989 Chip connection structure and method of forming
11/14/2013US20130299988 Graphene cap for copper interconnect structures
11/14/2013US20130299986 Methods for forming semiconductor device packages with photoimageable dielectric adhesive material, and related semiconductor device packages
11/14/2013US20130299985 Process for fabricating gallium arsenide devices with copper contact layer
11/14/2013US20130299982 Semiconductor Device and Method of Forming Interposer with Opening to Contain Semiconductor Die
11/14/2013US20130299975 Semiconductor Device and Method of Forming Through Vias with Reflowed Conductive Material
11/14/2013US20130299974 Semiconductor Device and Method of Forming Open Cavity in TSV Interposer to Contain Semiconductor Die in WLCSMP
11/14/2013US20130299973 Semiconductor Die and Method of Forming FO-WLCSP Vertical Interconnect Using TSV and TMV
11/14/2013US20130299969 Semiconductor package and method of manufacturing the semiconductor package
11/14/2013US20130299968 Semiconductor package and a substrate for packaging
11/14/2013US20130299967 Wsp die having redistribution layer capture pad with at least one void
11/14/2013US20130299966 Wsp die with offset redistribution layer capture pad
11/14/2013US20130299965 Semiconductor assemblies, structures, and methods of fabrication
11/14/2013US20130299961 Semiconductor package and fabrication method thereof
11/14/2013US20130299960 Thermally enhanced semiconductor packages and related methods
11/14/2013US20130299956 Semiconductor device manufacturing method and semiconductor device
11/14/2013US20130299955 Film based ic packaging method and a packaged ic device
11/14/2013US20130299954 Composite substrate and method of manufacturing the same
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