Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2013
11/27/2013CN102376656B Foundation island-free packaging structure without pins on four surfaces and manufacturing method thereof
11/27/2013CN102376590B Chip scale package and production method thereof
11/27/2013CN102368501B Preparation method of Gbased enhanced MOSHFET device
11/27/2013CN102351169B Systems and methods for nanowire growth and harvesting
11/27/2013CN102324428B One time programmable storage unit and manufacturing method thereof as well as one time programmable storage array
11/27/2013CN102318046B Fin and finFET formation by angled ion implantation
11/27/2013CN102272928B Embedded memory cell and method of manufacturing same
11/27/2013CN102246327B Magnetoresistance effect element and magnetic memory cell and magnetic random access memory using same
11/27/2013CN102246309B Trench-based power semiconductor devices with increased breakdown voltage characteristics
11/27/2013CN102246264B SOI wafer manufacturing method
11/27/2013CN102237294B Source and drain region, contact hole and methods for forming source and drain region and contact hole
11/27/2013CN102226985B Method for manufacturing G(gallium nitride) substrate
11/27/2013CN102217061B Improved wafer level chip scale packaging
11/27/2013CN102210019B Silicided trench contact to buried conductive layer
11/27/2013CN102194661B Heat treatment apparatus and method of manufacturing semiconductor device
11/27/2013CN102194654B Device and method for forming protective film on mini-camera chip
11/27/2013CN102138199B Slit valve control
11/27/2013CN102136449B Parasitic capacitance extracting method based on nested quasi-second order random collocation method
11/27/2013CN102117773B Semiconductor device and method for manufacturing same with stress memorization technology process
11/27/2013CN102115833B Gold beryllium alloy material for semiconductor devices and preparation method and application thereof
11/27/2013CN102089867B Plasma processing apparatus
11/27/2013CN102082107B Method for measuring temperature of chip
11/27/2013CN102082099B Process method for packaging semiconductor with exposed pins
11/27/2013CN102046616B Polymer, resist composition, and process for producing semiconductor using resist composition
11/27/2013CN102044418B Method for removal of surface oxides by electron attachment
11/27/2013CN102034702B Method of manufacturing semiconductor device and substrate processing apparatus
11/27/2013CN102024728B Semiconductor chip holding tray
11/27/2013CN102012589B TFT-LCD array substrate and manufacturing method thereof
11/27/2013CN102007543B Recording method for magnetic memory device
11/27/2013CN101981682B Method and device for application of chip module
11/27/2013CN101911285B Semiconductor device and manufacturing method thereof
11/27/2013CN101894907B Method for manufacturing CuxO-based resistance memory
11/27/2013CN101853793B Manufacturing method for semiconductor device
11/27/2013CN101848974B Dicing die bonding film having excellent burr property and reliability and semiconductor device using same
11/27/2013CN101835925B Stamper, process for producing same, process for producing molding, and aluminum base die for stamper
11/27/2013CN101761778B Gas mixture supplying method and apparatus
11/27/2013CN101644900B Exposure apparatus, method for manufacturing device
11/27/2013CN101626003B Semiconductor package and method for packaging semiconductor package
11/27/2013CN101470358B Method of placing substrate, method of transferring substrate, support system and lithographic projection apparatus
11/27/2013CN101345276B LED device and its preparing process
11/26/2013USRE44608 Solder joint flip chip interconnection
11/26/2013US8594823 Scanner performance comparison and matching using design and defect data
11/26/2013US8593784 Thin film structure that may be used with an adhesion layer
11/26/2013US8593780 Substrate removing method and storage medium
11/26/2013US8593779 Hybrid electrostatic chuck
11/26/2013US8593613 LCD exposure stage device and exposure system
11/26/2013US8593582 Active matrix substrate and display device
11/26/2013US8593561 Camera module and method for fabricating the same
11/26/2013US8593001 Patterned semiconductor bases
11/26/2013US8593000 Semiconductor device and manufacturing method thereof
11/26/2013US8592980 Carbon nanotube-modified low-K materials
11/26/2013US8592975 Semiconductor device and method of dual-molding die formed on opposite sides of build-up interconnect structure
11/26/2013US8592961 Method of manufacturing a semiconductor device
11/26/2013US8592958 Chip package and manufacturing method thereof
11/26/2013US8592956 Resist underlayer film composition and patterning process using the same
11/26/2013US8592946 Lithography for printing constant line width features
11/26/2013US8592945 Large dimension device and method of manufacturing same in gate last process
11/26/2013US8592943 Symmetrical center tap inductor structure
11/26/2013US8592941 Fuse structure having crack stop void, method for forming and programming same, and design structure
11/26/2013US8592940 Topography based patterning
11/26/2013US8592939 Semiconductor device and manufacturing method thereof
11/26/2013US8592935 MgS solar-blind UV radiation detector
11/26/2013US8592926 Substrate bonding with metal germanium silicon material
11/26/2013US8592922 Transistor device and a method of manufacturing the same
11/26/2013US8592918 Forming inter-device STI regions and intra-device STI regions using different dielectric materials
11/26/2013US8592916 Selectively raised source/drain transistor
11/26/2013US8592906 High-voltage semiconductor device with lateral series capacitive structure
11/26/2013US8592902 Semiconductor structure that reduces the effects of gate cross diffusion and method of forming the structure
11/26/2013US8592900 Drain extended CMOS with counter-doped drain extension
11/26/2013US8592894 Method of forming a power semiconductor device and power semiconductor device
11/26/2013US8592885 Nonvolatile semiconductor memory device and method for manufacturing the same
11/26/2013US8592869 Nitride-based heterojunction semiconductor device and method for the same
11/26/2013US8592864 Semiconductor device and method for forming the same
11/26/2013US8592862 Gallium nitride semiconductor structures with compositionally-graded transition layer
11/26/2013US8592830 LED unit
11/26/2013US8592825 Semiconductor device having Si-substrate and process to form the same
11/26/2013US8592816 Thin film transistor matrix device including first and second connection lines
11/26/2013US8592815 Light emitting display apparatus
11/26/2013US8592810 Thin film, method of forming the same, and semiconductor light-emitting element comprising the thin film
11/26/2013US8592795 Multilevel mixed valence oxide (MVO) memory
11/26/2013US8592794 Resistance random access memory element and method for making the same
11/26/2013US8592786 Platen clamping surface monitoring
11/26/2013US8592727 Heat treatment apparatus emitting flash of light
11/26/2013US8592713 Irradiating apparatus, semiconductor device manufacturing apparatus, semiconductor device manufacturing method, and display device manufacturing method
11/26/2013US8592676 Solar cell and method for manufacturing the same
11/26/2013US8592619 Bifunctional molecules comprising a cycloalkyne or heterocycloalkyne group and a redox group
11/26/2013US8592328 Method for depositing a chlorine-free conformal sin film
11/26/2013US8592327 Formation of SiOCl-containing layer on exposed low-k surfaces to reduce low-k damage
11/26/2013US8592326 Method for fabricating an inter dielectric layer in semiconductor device
11/26/2013US8592325 Insulating layers on different semiconductor materials
11/26/2013US8592324 Method for forming laminated structure including amorphous carbon film
11/26/2013US8592323 Method of large-area circuit layout recognition
11/26/2013US8592322 Method of fabricating openings
11/26/2013US8592321 Method for fabricating an aperture
11/26/2013US8592320 Method for forming fin-shaped semiconductor structure
11/26/2013US8592319 Substrate processing method and substrate processing apparatus
11/26/2013US8592318 Pitch reduction using oxide spacer
11/26/2013US8592317 Polishing solution for CMP and polishing method using the polishing solution
11/26/2013US8592316 Nitride semiconductor substrate, production method therefor and nitride semiconductor device
11/26/2013US8592315 Chemical mechanical polishing method
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