Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2004
05/04/2004US6731431 Unit including optical element having protrusion and optical element having recess; relative alignment between elements is accomplished by engagement of protrusion and recess; elements are opposed to each other with predetermined spacing
05/04/2004US6731386 Measurement technique for ultra-thin oxides
05/04/2004US6731377 Laser output control method, laser apparatus and exposure apparatus
05/04/2004US6731376 Illuminating single column of microdevice cells on mask with pulses of radiation, moving workpiece perpendicular to long axis of column, coordinating movement of workpiece with timing of pulses of radiation to pattern with images of cells
05/04/2004US6731375 Projection aligner, exposing method and semiconductor device
05/04/2004US6731374 Beam-splitter optics design that maintains an unflipped (unmirrored) image for a catadioptric lithographic system
05/04/2004US6731373 Method for imprinting a wafer with identifying information, and exposing method and apparatus for imprinting a wafer with identifying information
05/04/2004US6731372 Multiple chamber fluid mount
05/04/2004US6731371 Controlling decrease of transmittance on optical path to obtain high exposure light intensity, even when using vacuum ultraviolet light as exposure light
05/04/2004US6731353 Method and apparatus for transferring blocks
05/04/2004US6731352 Method for fabricating liquid crystal display
05/04/2004US6731320 Laser pattern generator
05/04/2004US6731171 Power amplifier module with stable idling current
05/04/2004US6731167 High frequency power amplifier module and wireless communication apparatus
05/04/2004US6731157 Adaptive threshold voltage control with positive body bias for N and P-channel transistors
05/04/2004US6731156 High voltage transistor protection technique and switching circuit for integrated circuit devices utilizing multiple power supply voltages
05/04/2004US6731153 Semiconductor integrated circuit having switching transistors and varactors
05/04/2004US6731130 Method of determining gate oxide thickness of an operational MOSFET
05/04/2004US6731123 Probe device
05/04/2004US6731046 Surface acoustic wave element and manufacturing method of the same
05/04/2004US6731013 Wiring substrate, semiconductor device and package stack semiconductor device
05/04/2004US6731012 Non-planar surface for semiconductor chips
05/04/2004US6731010 Resin sealed stacked semiconductor packages with flat surfaces
05/04/2004US6731008 Semiconductor device with conductive contact layer structure
05/04/2004US6731007 Semiconductor integrated circuit device with vertically stacked conductor interconnections
05/04/2004US6731006 Doped copper interconnects using laser thermal annealing
05/04/2004US6731005 Semiconductor device including fuses for relieving defective areas
05/04/2004US6731004 Electronic device and method of producing same
05/04/2004US6731003 Wafer-level coated copper stud bumps
05/04/2004US6730998 Stereolithographic method for fabricating heat sinks, stereolithographically fabricated heat sinks, and semiconductor devices including same
05/04/2004US6730997 Method of transferring ultra-thin substrates and application of the method to the manufacture of a multi-layered thin film device
05/04/2004US6730995 Two-stage transfer molding device to encapsulate MMC module
05/04/2004US6730992 Semiconductor device and method of manufacturing the same
05/04/2004US6730987 Compound semiconductor device, production method thereof, light-emitting device and transistor
05/04/2004US6730986 Bipolar junction transistors having trench-based base electrodes
05/04/2004US6730983 Semiconductor substrate having plurality of protruding portions formed on top face, and conductive layer wiring formed to have spiral shape and serve as induction element; no protrusions are formed in region directly below wiring
05/04/2004US6730982 FBEOL process for Cu metallizations free from Al-wirebond pads
05/04/2004US6730981 Bipolar transistor with inclined epitaxial layer
05/04/2004US6730980 Multi-trench region for accumulation of photo-generated charge in a CMOS imager
05/04/2004US6730977 Lower temperature method for forming high quality silicon-nitrogen dielectrics
05/04/2004US6730976 Multilayer gate electrode structure with tilted on implantation
05/04/2004US6730975 DRAM device
05/04/2004US6730974 Semiconductor devices, memory systems and electronic apparatuses with improved latch up suppression
05/04/2004US6730973 Semiconductor device
05/04/2004US6730972 Amorphous carbon insulation and carbon nanotube wires
05/04/2004US6730971 Semiconductor devices and methods of fabricating the same
05/04/2004US6730970 Thin film transistor and fabrication method of the same
05/04/2004US6730964 Semiconductor device and method of producing the same
05/04/2004US6730962 Method of manufacturing and structure of semiconductor device with field oxide structure
05/04/2004US6730959 Structure of flash memory device and fabrication method thereof
05/04/2004US6730958 Nonvolatile memory device with reduced floating gate and increased coupling ratio and manufacturing method thereof
05/04/2004US6730957 Non-volatile memory compatible with logic devices and fabrication method thereof
05/04/2004US6730956 Forming mold layer on semiconductor substrate, forming mold frame for storage node by introducing photomask having array of separated light transmitting patterns defining region to be occupied by node, forming node, patterning mold layer
05/04/2004US6730955 Semiconductor memory and process for fabricating the same
05/04/2004US6730954 Method of depositing tungsten nitride using a source gas comprising silicon
05/04/2004US6730952 Semiconductor device including ion implantion compensation region in cell array region
05/04/2004US6730951 Capacitor, semiconductor memory device, and method for manufacturing the same
05/04/2004US6730950 Local interconnect using the electrode of a ferroelectric
05/04/2004US6730948 Semiconductor device including acrylic resin layer
05/04/2004US6730947 Electrically connected by guard ring region
05/04/2004US6730944 InP based high temperature lasers with InAsP quantum well layers and barrier layers of Gax(ALIn)1-xP
05/04/2004US6730934 Optoelectronic material, device using the same and method for manufacturing optoelectronic material
05/04/2004US6730932 Semiconductor device and method of manufacturing the same
05/04/2004US6730931 Integrated circuit feature layout for improved chemical mechanical polishing
05/04/2004US6730930 Memory element and method for fabricating a memory element
05/04/2004US6730925 Method and apparatus for projection exposure and device manufacturing method
05/04/2004US6730920 Abbe arm calibration system for use in lithographic apparatus
05/04/2004US6730916 Electron beam lithography apparatus
05/04/2004US6730906 Method and apparatus for testing a substrate
05/04/2004US6730885 Batch type heat treatment system, method for controlling same, and heat treatment method
05/04/2004US6730858 Circuit board having bonding areas to be joined with bumps by ultrasonic bonding
05/04/2004US6730644 Cleaning solution for substrates of electronic materials
05/04/2004US6730620 Substrate processing method and substrate processing apparatus
05/04/2004US6730619 Method of manufacturing insulating layer and semiconductor device including insulating layer
05/04/2004US6730618 Low k dielectric materials with inherent copper ion migration barrier
05/04/2004US6730617 Method of fabricating one or more tiers of an integrated circuit
05/04/2004US6730616 Versatile plasma processing system for producing oxidation resistant barriers
05/04/2004US6730614 Method of forming a thin film in a semiconductor device
05/04/2004US6730612 Spray member and method for using the same
05/04/2004US6730611 Nitride semiconductor growing process
05/04/2004US6730610 Multiple thickness hard mask method for optimizing laterally adjacent patterned layer linewidths
05/04/2004US6730609 Etch aided by electrically shorting upper and lower sidewall portions during the formation of a semiconductor device
05/04/2004US6730608 Full image exposure of field with alignment marks
05/04/2004US6730607 Method for fabricating a barrier layer
05/04/2004US6730606 Trench growth techniques using selective epitaxy
05/04/2004US6730605 Redistribution of copper deposited films
05/04/2004US6730604 Dynamic contamination control of equipment controlled by a split runcard
05/04/2004US6730603 System and method of determining a polishing endpoint by monitoring signal intensity
05/04/2004US6730602 Method for forming aluminum bumps by sputtering and chemical mechanical polishing
05/04/2004US6730601 Methods for fabricating a metal-oxide-metal capacitor
05/04/2004US6730600 Method of dry etching a semiconductor device in the absence of a plasma
05/04/2004US6730599 Supplying treatment solution to substrate mounted on a holding member in states of a gas being supplied into treatment chamber and of atmosphere in treatment chamber being exhausted; measuring temperature of front face of substrate
05/04/2004US6730598 Integration of annealing capability into metal deposition or CMP tool
05/04/2004US6730597 Pre-ECD wet surface modification to improve wettability and reduced void defect
05/04/2004US6730596 Method of and apparatus for forming interconnection
05/04/2004US6730595 Protecting method for semiconductor wafer and surface protecting adhesive film for semiconductor wafer used in said method
05/04/2004US6730594 Method for manufacturing semiconductor device
05/04/2004US6730593 Method of depositing a low K dielectric with organo silane
05/04/2004US6730592 Methods for planarization of metal-containing surfaces using halogens and halide salts
05/04/2004US6730591 Method of using silicon rich carbide as a barrier material for fluorinated materials