Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2008
11/20/2008WO2008097736A3 Methods using block copolymer self-assembly for sub-lithographic patterning
11/20/2008WO2008097724A3 Passivation layer for a circuit device and method of manufacture
11/20/2008WO2008097278A3 Etch-enhanced technique for lift-off patterning
11/20/2008WO2008085498A8 Method for aligning die to substrate
11/20/2008WO2008080958A3 Composition for polishing surface made of silicon dioxide
11/20/2008WO2008069675A3 Multicrystalline silicon solar cells
11/20/2008WO2008060455A3 Methods for nanowire alignment and deposition
11/20/2008WO2008054379A3 Shape controlled growth of nanostructured films and objects
11/20/2008WO2008036371A3 Reduced leakage dram memory cells with vertically oriented nanorods and manufacturing methods thereof
11/20/2008WO2008020403B1 Method for improving interface reactions at semiconductor surfaces
11/20/2008WO2008016747A3 Method and system for controlling the uniformity of a ballistic electron beam by rf modulation
11/20/2008WO2008005354A3 Cleaning formulation for removing residues on surfaces
11/20/2008WO2007136412A3 Methods for oriented growth of nanowires on patterned substrates
11/20/2008WO2007123677A3 Apparatus and method for confined area planarization
11/20/2008WO2007120994B1 Methods and apparatus for selective pre-coating of a plasma processing chamber
11/20/2008WO2007117994A3 Process for reducing a size of a compact eeprom device
11/20/2008WO2007109198A3 Mirror magnetron plasma source
11/20/2008WO2007108932B1 Technique for preparing precursor films and compound layers for thin film solar cell fabrication and apparatus corresponding thereto
11/20/2008WO2007106764A3 Methods of performance improvement of hvmos devices
11/20/2008WO2007095421A3 Method for electrochemically polishing a conductive material on a substrate
11/20/2008WO2007095194A3 Method and apparatus for combinatorially varying materials, unit process and process sequence
11/20/2008WO2007095137A3 Method for conductivity control of (al,in,ga,b)n
11/20/2008WO2007075648A3 Component stacking for integrated circuit electronic package
11/20/2008WO2007035788A3 DENSE CHEVRON finFET AND METHOD OF MANUFACTURING SAME
11/20/2008WO2007034376A3 Memory device with a strained base layer and method of manufacturing such a memory device
11/20/2008WO2007027982A3 Devices and methods for providing stimulated raman lasing
11/20/2008WO2006138381A3 Tack & fuse chip bonding
11/20/2008WO2005024899A3 Method to produce transistor having reduced gate height
11/20/2008US20080288720 Multi-wafer 3d cam cell
11/20/2008US20080287573 Ultra-Low Dielectrics Film for Copper Interconnect
11/20/2008US20080287333 Non-Aqueous Microelectronic Cleaning Compositions Containing Fructose
11/20/2008US20080287322 Method and Coating Apparatus for the Manufacture of a Microarray
11/20/2008US20080287038 Polishing composition for semiconductor wafer, method for production thereof and polishing method
11/20/2008US20080287029 Array substrate having color filter on thin film transistor structure for LCD device and method of fabricating the same
11/20/2008US20080286984 Silicon-rich low-hydrogen content silicon nitride film
11/20/2008US20080286983 ligands such as 1-methoxy-2-methyl-2-propanolate increase volatility; chemical vapor deposition; atomic layer deposition
11/20/2008US20080286982 Plasma immersion ion implantation with highly uniform chamber seasoning process for a toroidal source reactor
11/20/2008US20080286981 In situ silicon and titanium nitride deposition
11/20/2008US20080286980 Substrate Processing Apparatus and Semiconductor Device Producing Method
11/20/2008US20080286979 Method of controlling sidewall profile by using intermittent, periodic introduction of cleaning species into the main plasma etching species
11/20/2008US20080286978 Etching and passivating for high aspect ratio features
11/20/2008US20080286977 Process to open carbon based hardmask overlying a dielectric layer
11/20/2008US20080286976 Method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process and etching method
11/20/2008US20080286975 Platinum nanodet etch process
11/20/2008US20080286974 Etching solution for multiple layer of copper and molybdenum and etching method using the same
11/20/2008US20080286973 Method for forming semiconductor fine-pitch pattern
11/20/2008US20080286972 Addition of ballast hydrocarbon gas to doped polysilicon etch masked by resist
11/20/2008US20080286971 CMOS Gate Structures Fabricated by Selective Oxidation
11/20/2008US20080286970 Method for producing a semiconductor component and a semiconductor component produced according to the method
11/20/2008US20080286969 Patterning methods
11/20/2008US20080286968 Solderable top metal for silicon carbide semiconductor devices
11/20/2008US20080286967 Method for fabricating a body to substrate contact or topside substrate contact in silicon-on-insulator devices
11/20/2008US20080286966 Method of forming a dielectric cap layer for a copper metallization by using a hydrogen based thermal-chemical treatment
11/20/2008US20080286965 Novel approach for reducing copper line resistivity
11/20/2008US20080286964 Semiconductor device and a method of manufacturing the same
11/20/2008US20080286963 Method for Producing Through-Contacts in Semi-Conductor Wafers
11/20/2008US20080286962 Method for fabricating metal pad
11/20/2008US20080286961 Semiconductor device manufacturing method
11/20/2008US20080286960 Method of manufacturing semiconductor device suitable for forming wiring using damascene method
11/20/2008US20080286959 Downhill Wire Bonding for QFN L - Lead
11/20/2008US20080286958 Semiconductor Substrate Having Enhanced Adhesion And Method For Manufacturing The Same
11/20/2008US20080286957 Method forming epitaxial silicon structure
11/20/2008US20080286956 Method of manufacturing a semiconductor device
11/20/2008US20080286955 Fabrication of Recordable Electrical Memory
11/20/2008US20080286954 Method of Forming Pattern of Semiconductor Device
11/20/2008US20080286953 Manufacturing method of semiconductor substrate, thin film transistor and semiconductor device
11/20/2008US20080286952 Manufacturing method of SOI substrate and manufacturing method of semiconductor device
11/20/2008US20080286951 Semiconductor Wafer With An Epitaxially Deposited Layer, And Process For Producing The Semiconductor Wafer
11/20/2008US20080286950 Semiconductor device and method for manufacturing the same
11/20/2008US20080286949 Method of Forming a Rare-Earth Dielectric Layer
11/20/2008US20080286948 Fabrication Method of Semiconductor Integrated Circuit Device
11/20/2008US20080286947 Process for Separating Disk-Shaped Substrates with the Use of Adhesive Powers
11/20/2008US20080286946 Wafer dicing method
11/20/2008US20080286945 Controlled process and resulting device
11/20/2008US20080286944 Method to Manufacture a Silicon Wafer Electronic Component Protected Against the Attacks and Such a Component
11/20/2008US20080286943 Motherboard Cutting Method, Motherboard Scribing Apparatus, Program and Recording Medium
11/20/2008US20080286942 Method of manufacturing a semiconductor device
11/20/2008US20080286941 Method of manufacturing a semiconductor device
11/20/2008US20080286940 Process for production of soi substrate and process for production of semiconductor device
11/20/2008US20080286939 Method for manufacturing SOI substrate
11/20/2008US20080286938 Semiconductor device and fabrication methods thereof
11/20/2008US20080286937 Manufacturing Method for Bonded Wafer
11/20/2008US20080286936 Method for preparing a shallow trench isolation
11/20/2008US20080286935 Method of fabricating an isolation shallow trench
11/20/2008US20080286934 Method of forming a trench capacitor
11/20/2008US20080286933 Integrated circuit inductor with integrated vias
11/20/2008US20080286932 Method of manufacturing semiconductor device
11/20/2008US20080286931 Semiconductor device including field-effect transistor using salicide (self-aligned silicide) structure and method of fabricating the same
11/20/2008US20080286930 Nitride-encapsulated fet (nncfet)
11/20/2008US20080286929 Method for manufacturing semiconductor device
11/20/2008US20080286928 method of manufacturing a semiconductor integrated circuit device
11/20/2008US20080286927 Non-volatile memory device with buried control gate and method of fabricating the same
11/20/2008US20080286926 Bit line of a semiconductor device and method for fabricating the same
11/20/2008US20080286925 Nonvolatile memory with backplate
11/20/2008US20080286924 Semiconductor memory device and method of manufacturing the same
11/20/2008US20080286923 Method for fabricating flash memory
11/20/2008US20080286922 Method of fabricating semiconductor device
11/20/2008US20080286921 Methods of forming silicides of different thicknesses on different structures
11/20/2008US20080286920 Method for manufacturing semiconductor device
11/20/2008US20080286919 Tunnel and gate oxide comprising nitrogen for use with a semiconductor device and a process for forming the device
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