| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 06/03/1997 | US5636176 Synchronous DRAM responsive to first and second clock signals |
| 06/03/1997 | US5636175 Row decoder/driver circuit for determining non selected wordlines and for driving non-selected wordlines to a potential less than the lowest potential of the digit lines |
| 06/03/1997 | US5635862 High-speed block id encoder circuit using dynamic logic |
| 05/27/1997 | US5633833 Address buffer for blocking noise |
| 05/27/1997 | US5633832 Reduced area word line driving circuit for random access memory |
| 05/27/1997 | US5633830 Random access memory block circuitry for programmable logic array integrated circuit devices |
| 05/27/1997 | US5633829 Serial access memory device capable of controlling order of access to memory cell areas |
| 05/21/1997 | EP0774712A2 Interleaving block operations in a computer system |
| 05/21/1997 | CN1150492A Bit map addressing schemes for flash memory |
| 05/20/1997 | US5631869 Semiconductor memory unit having overlapping addresses |
| 05/20/1997 | US5631577 Synchronous dual port RAM |
| 05/20/1997 | US5631183 Method of reducing word line resistance of a semiconductor memory |
| 05/14/1997 | EP0773550A2 Semiconductor memory device with reduced leakage current and improved data retention |
| 05/13/1997 | US5629903 Semiconductor memory device |
| 05/13/1997 | US5629901 Multi write port register |
| 05/13/1997 | US5629896 In an asynchronous integrated memory circuit |
| 05/13/1997 | US5629895 Semiconductor memory device |
| 05/13/1997 | US5629640 Semiconductor memory device |
| 05/07/1997 | EP0771463A1 Process and device for storing and rotating bit configurations |
| 05/06/1997 | US5627796 Pulse generation circuit and memory circuit including same |
| 05/06/1997 | US5627787 Periphery stress test for synchronous RAMs |
| 05/06/1997 | US5627361 Wand for reading and writing information to electronic tokens |
| 05/01/1997 | WO1997005617A3 Systems and methods for accessing a data storage device |
| 04/29/1997 | US5625790 Computer system |
| 04/29/1997 | US5625604 Address transition detection circuit for a memory device having signal delay circuitry |
| 04/29/1997 | US5625595 Semiconductor memory device allowing selection of the number of sense amplifiers to be activated simultaneously |
| 04/29/1997 | US5625591 Non-volatile semiconductor memory device |
| 04/24/1997 | WO1997014289A2 Protocol for communication with dynamic memory |
| 04/23/1997 | CN1148222A Synchronous counter and method for propagating carry of same |
| 04/22/1997 | US5623454 Semiconductor memory device |
| 04/22/1997 | US5623221 Semiconductor integrated circuit device |
| 04/22/1997 | US5623218 Address transition signal detecting circuit |
| 04/17/1997 | WO1997014221A1 Decoder gate |
| 04/17/1997 | DE19537905A1 Memory access interface circuit |
| 04/16/1997 | EP0768672A1 Hierarchic memory device |
| 04/15/1997 | US5621696 Virtual multiple-read port memory array |
| 04/15/1997 | US5621690 Nonvolatile memory blocking architecture and redundancy |
| 04/10/1997 | WO1997013250A1 Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell |
| 04/08/1997 | US5619674 Multiport cache memory having read-only parts and read-write parts |
| 04/08/1997 | US5619473 Semiconductor memory device with dual address memory read amplifiers |
| 04/08/1997 | US5619162 Signal control circuit for generating an output potential |
| 04/08/1997 | US5619151 Digital memory apparatus |
| 04/08/1997 | US5619066 Serial-port memory |
| 04/03/1997 | WO1997012370A1 Register file read/write cell |
| 04/02/1997 | EP0765762A1 Ink jet print head identification circuit with serial out, dynamic shift registers |
| 04/01/1997 | US5617555 Burst random access memory employing sequenced banks of local tri-state drivers |
| 04/01/1997 | US5617365 Semiconductor device having redundancy circuit |
| 04/01/1997 | US5617049 Pulse signal generator and redundancy selection signal generator |
| 04/01/1997 | US5617047 Reset and pulse width control circuits for high-performance multi-port memories and register files |
| 03/27/1997 | WO1997011464A1 Pipelined burst multi-way associative cache memory device |
| 03/25/1997 | US5615164 Latched row decoder for a random access memory |
| 03/20/1997 | WO1997010600A1 Device for skip addressing certain lines in a serially operating digital store |
| 03/20/1997 | WO1997010599A1 Fast word line decoder for memory devices |
| 03/19/1997 | EP0763240A1 Bit map addressing schemes for flash memory |
| 03/18/1997 | US5613094 Method and apparatus for enabling an assembly of non-standard memory components to emulate a standard memory module |
| 03/18/1997 | US5612926 Sequential access memory |
| 03/18/1997 | US5612925 Semiconductor memory device |
| 03/18/1997 | US5612924 Semiconductor memory device using internal voltage obtained by boosting supply voltage |
| 03/18/1997 | US5612923 Multi-port random access memory |
| 03/13/1997 | WO1997009719A1 Segmented read line circuit particularly useful for multi-port storage arrays |
| 03/11/1997 | US5610873 Address generator for generating a plurality of addresses to be used in zig-zag scanning of contents of memory array |
| 03/11/1997 | US5610870 Circuit and method for controlling the impedance of a serial access memory |
| 03/11/1997 | US5610863 Memory device having a booster circuit and a booster circuit control method |
| 03/06/1997 | WO1997004457A3 Pipelined address memories, and systems and methods using the same |
| 03/05/1997 | EP0760512A2 Low pin count - wide memory devices and systems and methods using the same |
| 03/04/1997 | US5608688 DRAM having output control circuit |
| 03/04/1997 | US5608687 Output driver control for ROM and RAM devices |
| 03/04/1997 | US5608674 Semiconductor memory device |
| 02/27/1997 | WO1997007408A1 Voltage detecting circuit, a power on/off resetting circuit, and a semiconductor device |
| 02/27/1997 | DE19503390C2 Datenausgabepuffer-Steuerschaltung Data output buffer control circuit |
| 02/26/1997 | EP0759618A2 Semiconductor memory device including divisional decoder circuit composed of nmos transistors |
| 02/26/1997 | EP0497962B1 Sense enable timing circuit for a random access memory |
| 02/25/1997 | US5606717 Memory circuitry having bus interface for receiving information in packets and access time registers |
| 02/25/1997 | US5606530 High speed ROM decode circuit |
| 02/25/1997 | US5606525 Data register structure and semiconductor integrated circuit device using the same |
| 02/25/1997 | US5606524 Non-volatile semiconductor memory device capable of effecting high-speed operation with low voltage |
| 02/25/1997 | US5606265 Semiconductor integrated circuits with power reduction mechanism |
| 02/20/1997 | WO1997006533A1 High speed, low voltage non-volatile memory |
| 02/18/1997 | US5604884 Burst SRAMS for use with a high speed clock |
| 02/18/1997 | US5604712 Fast word line decoder for memory devices |
| 02/18/1997 | US5604711 Low power high voltage switch with gate bias circuit to minimize power consumption |
| 02/18/1997 | US5604701 Initializing a read pipeline of a non-volatile sequential memory device |
| 02/18/1997 | US5604455 Transition detection device generating a variable-duration pulse |
| 02/13/1997 | WO1997005619A1 Initializing a read pipeline of a non-volatile sequential memory device |
| 02/13/1997 | WO1997005617A2 Systems and methods for accessing a data storage device |
| 02/12/1997 | CN1142672A Dynamical memory |
| 02/11/1997 | US5603000 Integrated circuit memory with verification unit which resets an address translation register upon failure to define one-to-one correspondences between addresses and memory cells |
| 02/11/1997 | US5602987 Flash EEprom system |
| 02/11/1997 | US5602797 Word line driving circuit for memory |
| 02/11/1997 | US5602796 Word line driver in a semiconductor memory device |
| 02/11/1997 | US5602784 Power consumption reducing circuit having word-line resetting ability regulating transistors |
| 02/06/1997 | WO1997004458A1 Semiconductor storage device and method for boosting word line of the device |
| 02/06/1997 | WO1997004457A2 Pipelined address memories, and systems and methods using the same |
| 02/06/1997 | WO1997004395A1 Method and apparatus for encryption key creation |
| 02/06/1997 | WO1997004378A1 Microcircuit with memory that is protected by both hardware and software |
| 02/06/1997 | WO1997004377A1 Single chip microprocessor, math co-processor, random number generator, real-time clock and ram having a one-wire interface |
| 02/06/1997 | WO1997004376A1 Secure module with microprocessor and co-processor |
| 02/05/1997 | EP0757353A2 Multi-port random access memory |
| 02/05/1997 | EP0757323A2 Method of write to graphic memory where memory cells designated by plurality of addresses selected simultaneously for one row address are written |
| 02/04/1997 | US5600606 Low pin count - wide memory devices using non-multiplexed addressing and systems and methods using the same |