Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
09/1997
09/09/1997US5666321 Synchronous DRAM memory with asynchronous column decode
09/09/1997US5666319 Sense amplifier
09/09/1997US5666314 Semiconductor memory device for selecting and deselecting blocks of word lines
09/09/1997US5666313 Semiconductor memory device with complete inhibition of boosting of word line drive signal and method thereof
09/04/1997WO1997032333A1 Method and apparatus for reducing latency time on an interface by overlapping transmitted packets
09/04/1997WO1997032310A1 A boosted word line driver circuit
09/04/1997WO1997032308A1 Method and apparatus for reducing latency time on an interface by overlapping transmitted packets
09/03/1997EP0793236A2 Semiconductor memory device having address transition detection circuit for controlling sense and latch operations
09/03/1997EP0793235A2 Single-chip memory system having a decoder for pulse word line method
09/03/1997EP0793176A2 Semiconductor memory device capable of preventing malfunction due to disconnection of column select line or word select line
09/03/1997CN1158668A Method and system for storing data blocks in a memory device
09/02/1997US5663925 Method and apparatus for timing control in a memory device
09/02/1997US5663923 Nonvolatile memory blocking architecture
09/02/1997US5663922 Method for the anticipated reading of serial access memory, and memory pertaining thereto
09/02/1997US5663920 Semiconductor memory word line driver circuit
09/02/1997US5663917 Semiconductor circuit having MOS circuit for use in strong electric field
09/02/1997US5663911 Semiconductor device having a booster circuit
08/1997
08/27/1997CN1158178A Semiconductor storage device and method for boosting word line of the device
08/26/1997US5661694 Programmable semiconductor memory device
08/26/1997US5661692 Read/write dual port memory having an on-chip input data register
08/26/1997US5661676 Semiconductor memory and method of fabricating the same
08/19/1997US5659711 Multiport memory and method of arbitrating an access conflict therein
08/13/1997EP0789364A2 High density SIMM or DIMM with RAS address re-mapping
08/12/1997US5657481 Memory device with a phase locked loop circuitry
08/12/1997US5657469 Selective access to divided word line segments in cache memory
08/12/1997US5657466 Circuit for designating write and read address to provide a delay time in a sound system
08/12/1997US5657444 Microprocessor with secure programmable read only memory circuit
08/12/1997US5657291 Multiport register file memory cell configuration for read operation
08/12/1997US5657287 Enhanced multiple block writes to adjacent blocks of memory using a sequential counter
08/12/1997US5657285 Method of operating memory devices
08/12/1997US5657273 Semiconductor device capable of concurrently transferring data over read paths and write paths to a memory cell array
08/12/1997US5657269 Semiconductor storage device having address-transition detecting circuit and sense-determination detecting circuit
08/07/1997WO1997021241A3 Method of driving a field effect transistor
08/06/1997EP0788112A2 Memory addressing circuit
08/06/1997EP0788111A1 Drive circuit for memory line decoder driver
08/06/1997EP0787993A1 Voltage detecting circuit, a power on/off resetting circuit, and a semiconductor device
08/05/1997US5654935 Semiconductor memory
08/05/1997US5654934 Semiconductor memory employing a block-write system
08/05/1997US5654915 6-bulk transistor static memory cell using split wordline architecture
08/05/1997US5654836 Method and circuit for detecting auto tracking find error in a video cassette recorder and accordingly controlling capstan phase for correct video head tracking
07/1997
07/31/1997WO1997027592A1 Interdigitated memory array
07/29/1997US5652731 Semiconductor memory device including divisional decoder circuit composed of NMOS transistors
07/29/1997US5652730 Semiconductor memory device having hierarchical boosted power-line scheme
07/29/1997US5652723 Semiconductor memory device
07/29/1997US5652535 Non-overlaping signal generation circuit
07/29/1997US5652450 Nonvolatile semiconductor storage device
07/23/1997EP0784852A1 High speed, low voltage non-volatile memory
07/22/1997US5651130 Memory controller that dynamically predicts page misses
07/22/1997US5650979 Semiconductor read-only VLSI memory
07/22/1997US5650977 Integrated circuit memory device including banks of memory cells and related methods
07/22/1997US5650976 Dual strobed negative pumped wordlines for dynamic random access memories
07/22/1997US5650971 Sense amplifier for a multiport memory and method
07/22/1997US5650968 Semiconductor memory device
07/16/1997EP0783755A1 Initializing a read pipeline of a non-volatile sequential memory device
07/16/1997CN1154607A Ink jet print head identification circuit with serial out, dynamic shift registers
07/16/1997CN1154561A Semiconductor storage device and electronic equipment using the same
07/15/1997US5648933 Structure for deselecting broken select lines in memory arrays
07/09/1997EP0783169A2 Virtual ground array memory
07/09/1997EP0782746A1 Storage device and process for simultaneously reading and recording data
07/08/1997US5646903 Memory cell having a shared read/write line
07/08/1997US5646902 Static random access memory device with low power dissipation
07/08/1997US5646894 Smart boost circuit for low voltage flash EPROM
07/08/1997US5646893 Segmented read line circuit particularly useful for multi-port storage arrays
07/08/1997US5646890 Flexible byte-erase flash memory and decoder
07/08/1997US5646565 Pulse-width-extension circuit and electronic device including the circuit
07/03/1997DE19625884A1 Semiconductor DRAM apparatus using bidirectional read amplifier
07/02/1997EP0782149A2 Device for generating and regulating a gate voltage in a non-volatile memory
07/02/1997EP0782143A2 A semiconductor memory circuit equipped with a column addressing circuit having a shift register
07/02/1997CN1153387A Semiconductor memory device having dual word line configuration
07/01/1997US5644547 Multiport memory cell
07/01/1997US5644538 Circuit and method for controllng the duration of pulses in a control signal from an electronic system
06/1997
06/26/1997DE19644443A1 Address transition detector circuit device for semiconductor memory
06/25/1997EP0780846A2 Field programmable memory array
06/25/1997EP0780017A1 System comprising field programmable gate array and intelligent memory
06/24/1997US5642326 Dynamic memory
06/24/1997US5642325 Register file read/write cell
06/24/1997US5642322 Layout of semiconductor memory and content-addressable memory
06/24/1997US5642320 Self-refreshable dual port dynamic CAM cell and dynamic CAM cell array refreshing circuit
06/24/1997US5642315 Static type of semiconductor memory device having great low voltage operation margin
06/24/1997US5642313 Voltage booster circuit for a memory device
06/19/1997DE19652305A1 Serial access memory set with two serial access memories
06/18/1997CN1152173A System with method power and signal buses on cell array
06/17/1997US5640365 Semiconductor memory device with a decoding peripheral circuit for improving the operation frequency
06/17/1997US5640364 Integrated memory device
06/17/1997US5640359 Word driver circuit and a memory circuit using the same
06/17/1997US5640358 Burst transmission semiconductor memory device
06/17/1997US5640338 Semiconductor memory device
06/12/1997WO1997021241A2 Method of driving a field effect transistor
06/12/1997DE19644495A1 Semiconductor memory device for use with high density gigabit memory
06/12/1997DE19604786C1 Data addressing device for sequential matrix memory
06/12/1997DE19545558A1 Verfahren zur Ansteuerung eines Feldeffekttransistors Method for driving a field effect transistor
06/11/1997EP0778572A2 Information data recording and reproducing apparatus and methods
06/11/1997CN1151592A Semiconductor memory device comprising address transition detecting circuit having stable response characteristic for address signal conversion
06/10/1997US5638334 Integrated circuit I/O using a high performance bus interface
06/10/1997US5638023 Charge pump circuit
06/10/1997US5638015 Avoiding instability
06/05/1997DE19650303A1 Integrierte Speicherschaltung An integrated memory circuit
06/04/1997EP0777233A1 A memory architecture using conserved adressing and systems and methods using the same
06/04/1997EP0777232A2 Programmable time delay in or relating to semiconductor memories
06/03/1997US5636177 Static random access memory with improved noise immunity