| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 03/17/1998 | US5729160 Self-timed circuit control device and method |
| 03/11/1998 | CN1175773A Shared bootstrap circuit |
| 03/11/1998 | CN1037720C Semiconductor integral circuit |
| 03/10/1998 | US5727182 Method and apparatus for adjusting output current values for expansion memories |
| 03/10/1998 | US5726946 Semiconductor integrated circuit device having hierarchical power source arrangement |
| 03/10/1998 | US5726939 Semiconductor memory device having fast writing circuit for test thereof |
| 03/10/1998 | US5726938 Semiconductor device provided with a level conversion means for enabling a connection between logic circuits |
| 03/04/1998 | EP0827082A1 Semiconductor memory having arithmetic function, and processor using the same |
| 03/04/1998 | EP0523996B1 Integrated circuit memory device with redundant rows |
| 03/04/1998 | CN1175030A Column address counter with 2 subtracter used for address compare |
| 03/03/1998 | US5724553 Electronic system with circuitry for generating memory column addresses using memory array type bits in a control register |
| 03/03/1998 | US5724545 For use in a reading and writing apparatus |
| 03/03/1998 | US5724482 Smart tray for audio player |
| 03/03/1998 | US5724302 High density decoder |
| 03/03/1998 | US5724299 Multiport register file memory using small voltage swing for write operation |
| 03/03/1998 | US5724296 Self-refreshable dual port dynamic CAM cell and dynamic CAM cell array refreshing circuit |
| 03/03/1998 | US5724286 Flexible DRAM array |
| 02/24/1998 | US5721709 Address decoder circuits adjusted for a high speed operation at a low power consumption |
| 02/24/1998 | US5721708 Reduction of the address pins of the integrated circuit |
| 02/19/1998 | DE19651768C1 Voltage boost circuit for semiconductor memory |
| 02/17/1998 | US5719820 Semiconductor memory device |
| 02/17/1998 | US5719819 Semiconductor storage circuit device operating in a plurality of operation modes and corresponding device for designing a semiconductor storage circuit device |
| 02/17/1998 | US5719818 Row decoder having triple transistor word line drivers |
| 02/17/1998 | US5719817 Memory array using selective device activation |
| 02/17/1998 | US5719814 Semiconductor memory device capable of storing high potential level of data |
| 02/17/1998 | US5719808 Flash EEPROM system |
| 02/11/1998 | EP0823117A1 Nonvolatile memory blocking architecture |
| 02/10/1998 | US5717896 Method and apparatus for performing pipeline store instructions using a single cache access pipestage |
| 02/10/1998 | US5717650 Row/column decoder circuits for a semiconductor memory device |
| 02/10/1998 | US5717649 Semiconductor memory device using sub-wordline drivers having width/length ratio of transistors varies from closest to farthest location from memory block selection circuits |
| 02/10/1998 | US5717646 Random access multiport memory capable of simultaneously accessing memory cells from a plurality of interface ports |
| 02/10/1998 | US5717638 Multi-port memory cells and memory with parallel data initialization |
| 02/10/1998 | US5717625 Semiconductor memory device |
| 02/03/1998 | USRE35723 Synchronous burst-access memory |
| 02/03/1998 | US5715212 Semiconductor memory device comprising address transition detecting circuit having stable response characteristic for address signal conversion |
| 02/03/1998 | US5715209 Integrated circuit memory devices including a dual transistor column selection switch and related methods |
| 02/03/1998 | US5715208 Memory device and method for reading data therefrom |
| 02/03/1998 | US5715188 Method and apparatus for parallel addressing of CAMs and RAMs |
| 01/28/1998 | CN1171867A Interleaved and sequential counter |
| 01/27/1998 | US5713006 Electronic device and method for selective enabling of access to configuration registers used by a memory controller |
| 01/27/1998 | US5712823 Flexible dram array |
| 01/22/1998 | WO1998002886A2 Memory with fast decoding |
| 01/21/1998 | EP0819341A1 Multiport ram for use within a viterbi decoder |
| 01/20/1998 | US5710742 High density two port SRAM cell for low voltage CMOS applications |
| 01/20/1998 | US5710741 Power up intialization circuit responding to an input signal |
| 01/20/1998 | US5710737 Semiconductor memory device |
| 01/13/1998 | US5708625 Voltage level detector |
| 01/13/1998 | US5708624 Method and structure for controlling internal operations of a DRAM array |
| 01/13/1998 | US5708623 Semiconductor memory decoder device |
| 01/13/1998 | US5708621 Semiconductor memory with improved word line structure |
| 01/13/1998 | US5708620 Memory device having a plurality of bitlines between adjacent columns of sub-wordline drivers |
| 01/13/1998 | US5708618 Multiport field memory |
| 01/13/1998 | US5708604 Dynamic selection control in a memory |
| 01/13/1998 | US5708455 Active matrix display device |
| 01/07/1998 | EP0817198A1 Semiconductor memory device |
| 01/07/1998 | EP0817197A2 Improvements in or relating to integrated circuits |
| 01/07/1998 | EP0815561A2 Optimization circuitry and control for a synchronous memory device with programmable latency period |
| 01/07/1998 | CN1169578A Semiconductor memory device |
| 01/06/1998 | US5706480 Memory device and method for processing digital video signal |
| 01/06/1998 | US5706323 Dynamic 1-of-2N logic encoding |
| 01/06/1998 | US5706247 Integrated memory device |
| 01/06/1998 | US5706246 Address transition detection circuit |
| 01/06/1998 | US5706245 Word line decoding circuit of a semiconductor memory device |
| 01/06/1998 | US5706243 Semiconductor memory and method of using the same, column decoder, and image processor |
| 01/06/1998 | US5706230 Internal voltage boosting method and circuit for a semiconductor memory device |
| 01/06/1998 | US5706229 Semiconductor memory device |
| 01/02/1998 | DE19727424A1 Input buffer for solid state memories |
| 01/02/1998 | DE19727087A1 Synchronous graphic RAM |
| 01/02/1998 | DE19723432A1 Verfahren zum Verteilen von Banken in einem Halbleiterspeicher-Bauelement Procedure for the distribution of banks in a semiconductor memory device |
| 12/31/1997 | CN1169016A Semi-conductor storage device |
| 12/30/1997 | US5704059 Method of write to graphic memory where memory cells designated by plurality of addresses selected simultaneously for one row address are written |
| 12/30/1997 | US5704039 Mask programmable security system for a data processor and method therefor |
| 12/30/1997 | US5703832 tRAS protection circuit |
| 12/30/1997 | US5703827 Method and structure for generating a boosted word line voltage and a back bias voltage for a memory array |
| 12/30/1997 | US5703825 Semiconductor integrated circuit device having a leakage current reduction means |
| 12/30/1997 | US5703804 Semiconductor memory device |
| 12/30/1997 | US5703499 Address bit latching input circuit |
| 12/29/1997 | EP0814479A2 Semiconductor circuit having circuit supplying voltage higher than power supply voltage |
| 12/24/1997 | WO1997049086A1 Flash memory address decoder with novel latch |
| 12/23/1997 | US5701273 Memory device |
| 12/23/1997 | US5701143 Circuits, systems and methods for improving row select speed in a row select memory device |
| 12/17/1997 | EP0813207A2 First read cycle circuit for semiconductor memory |
| 12/17/1997 | EP0813206A2 Self adjusting sense amplifier clock delay circuit |
| 12/17/1997 | CN1168191A Register file read/write cell |
| 12/17/1997 | CN1167987A Word line driver circuit |
| 12/16/1997 | US5699315 Data processing with energy-efficient, multi-divided module memory architectures |
| 12/16/1997 | US5699313 High voltage boosted word line supply charge pump and regulator for dram |
| 12/16/1997 | US5699301 Semiconductor memory device |
| 12/16/1997 | US5699300 Divided wordline memory arrangement having overlapping activation of wordlines during continuous access cycle |
| 12/16/1997 | US5699299 Semiconductor memory device with a plurality of column select lines and column driving method therefor |
| 12/16/1997 | US5698995 Clock signal generator and integrated circuit including the clock signal generator |
| 12/16/1997 | US5698994 Data output circuit, intermediate potential setting circuit, and semiconductor integrated circuit |
| 12/11/1997 | WO1997042557A3 Asynchronous request/synchronous data dynamic random access memory |
| 12/10/1997 | EP0811980A2 Low voltage bootstrapping circuit |
| 12/09/1997 | US5696731 Semiconductor memory device using internal voltage obtained by boosting supply voltage |
| 12/09/1997 | US5696730 First read cycle circuit for semiconductor memory |
| 12/09/1997 | US5696728 Negative voltage level shift circuit |
| 12/09/1997 | US5696721 Dynamic random access memory having row decoder with level translator for driving a word line voltage above and below an operating supply voltage range |
| 12/09/1997 | US5696715 Semiconductor memory device having bipolar and field effect transistors and an improved coupling arrangement for logic units or logic blocks |
| 12/09/1997 | US5696498 Address encoding method and address decoding circuit therefor |