G11C 8 - Arrangements for selecting an address in a digital store

Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
11/2004
11/30/2004	US6825053 Test key and method for validating the position of a word line overlaying a trench capacitor in DRAMS
11/25/2004	WO2004102780A1 Semiconductor integrated circuit device
11/25/2004	WO2004102576A2 Semiconductor memory device and method of operating same
11/25/2004	US20040236898 Synchronous semiconductor storage device module and its control method, information device
11/25/2004	US20040236894 Memory system having a multiplexed high-speed channel
11/25/2004	US20040233774 Semiconductor memory device
11/25/2004	US20040233772 Semiconductor device, semiconductor circuit, electronic equipment, and method of controlling clock-supply
11/25/2004	US20040233771 Stack element circuit
11/25/2004	US20040233770 Dynamic ram-and semiconductor device
11/25/2004	US20040233766 Function switching method, function switching apparatus, data storage method, data storage apparatus, device, and air conditioner
11/25/2004	US20040233765 Structure and method for transferring column address
11/25/2004	US20040233756 Synchronous semiconductor memory device
11/25/2004	US20040233707 Memory with address management
11/25/2004	US20040233703 Flash memory device having column predecoder capable of selecting all column selection transistors and stress test method thereof
11/25/2004	DE10319158A1 Flexible deactivation of row memory lines in dynamic memory components, especially RLDRAM components, whereby a device is used to selectively delay deactivation of a memory row address
11/25/2004	DE10318625A1 Memory cell used in DRAMs has an auxiliary structure formed in active regions and an addressing line formed in the region between the substrate surface and the upper edge of the auxiliary structure
11/24/2004	EP1410396B1 A voltage boost circuit using supply voltage detection to compensate for supply voltage variations in read mode voltages
11/24/2004	EP1129409B1 Redundant form address decoder for memory system
11/23/2004	US6823432 Method and apparatus for load distribution across memory banks with constrained access
11/23/2004	US6822924 Synchronous semiconductor memory device having clock synchronization circuit and circuit for controlling on/off of clock tree of the clock synchronization circuit
11/23/2004	US6822921 Semiconductor device having semiconductor memory
11/23/2004	US6822920 SRAM-compatible memory device employing DRAM cells
11/23/2004	US6822918 Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
11/23/2004	US6822908 Synchronous up/down address generator for burst mode read
11/23/2004	US6822903 Apparatus and method for disturb-free programming of passive element memory cells
11/23/2004	US6822887 Semiconductor circuit device with mitigated load on interconnection line
11/23/2004	US6822494 Register controlled delay locked loop
11/23/2004	US6822493 Voltage detection circuit, power-on/off reset circuit, and semiconductor device
11/18/2004	US20040230743 Techniques for increasing bandwidth in port-per-module memory systems having mismatched memory modules
11/18/2004	US20040230736 Negative voltage word line decoder, having compact terminating elements
11/18/2004	US20040228197 Compressed event counting technique and application to a flash memory system
11/18/2004	US20040228176 Semiconductor memory device having a hierarchical I/O structure
11/18/2004	US20040228174 Nonvolatile semiconductor memory device
11/18/2004	US20040228168 Semiconductor memory device and method of operating same
11/18/2004	US20040228157 Hacker-proof one time programmable memory
11/18/2004	DE10361677A1 Halbleitereinrichtung zur Domäne-Kreuzung Semiconductor device for domain-crossing
11/18/2004	DE10317364A1 Integrierter dynamischer Speicher mit Steuerungsschaltung zur Steuerung eines Refresh-Betriebs von Speicherzellen Integrated dynamic memory control circuit for controlling a refresh operation of memory cells
11/17/2004	EP1476905A1 Integrated read-only memory, method for operating said read-only memory and corresponding production method
11/16/2004	US6820102 DSP unit for multi-level global accumulation
11/16/2004	US6819627 Method for storing data, method for reading data, apparatus for storing data and apparatus for reading data
11/16/2004	US6819622 Write and erase protection in a synchronous memory
11/16/2004	US6819621 Method and apparatus for standby power reduction in semiconductor devices
11/16/2004	US6819596 Semiconductor memory device with test mode
11/16/2004	US6819585 Magnetic random access memory
11/16/2004	US6819582 Nonvolatile ferroelectric memory device with split word lines
11/16/2004	US6819134 Decoding circuit for wafer burn-in test
11/11/2004	US20040225856 Method and circuit for allocating memory arrangement addresses
11/11/2004	US20040223402 Nonvolatile ferroelectric memory and control device using the same
11/11/2004	US20040223400 Logic circuits for performing threshold functions
11/11/2004	US20040223399 Method for detecting a resistive path or a predetermined potential in non-volatile memory electronic devices
11/11/2004	US20040223398 Method and device for a scalable memory building block
11/11/2004	US20040223374 Synchronous up/down address generator for burst mode read
11/11/2004	US20040223369 Column decoder circuit and method for connecting data lines with bit lines in a semiconductor memory device
11/11/2004	US20040223367 Phase detector for all-digital phase locked and delay locked loops
11/11/2004	US20040223366 Semiconductor device with non-volatile memory and random access memory
11/11/2004	US20040223354 Semiconductor memory device having high-speed input/output architecture
11/11/2004	DE102004019200A1 Non volatile semiconductor memory device e.g. NAND type flash memory device, for electronic device, has selecting device driving word lines in selected row to program voltage in which pass voltage is applied to non-selected rows
11/10/2004	EP1236278A4 Method and apparatus for an n-nary logic circuit
11/10/2004	CN1175424C Semiconductor integrated circuit device
11/09/2004	USRE38651 Variable depth and width memory device
11/09/2004	US6816955 Logic for providing arbitration for synchronous dual-port memory
11/09/2004	US6816430 Device for storage of multiport data, particularly for an arithmetic and logic unit of a digital signal processing processor
11/09/2004	US6816418 MIS semiconductor device having improved gate insulating film reliability
11/09/2004	US6816410 Method for programming a three-dimensional memory array incorporating serial chain diode stack
11/09/2004	US6815992 Circuit for testing and fine tuning integrated circuit (switch control circuit)
11/09/2004	US6815990 Delay locked loops having blocking circuits therein that enhance phase jitter immunity and methods of operating same
11/09/2004	US6815985 Clock divider and method for dividing a clock signal in a DLL circuit
11/09/2004	US6815742 System with meshed power and signal buses on cell array
11/04/2004	WO2004095468A1 Semiconductor device
11/04/2004	WO2004095466A1 Semiconductor memory
11/04/2004	WO2004095462A1 Fast, accurate and low power supply voltage booster using a/d converter
11/04/2004	WO2004095460A2 Asynchronous jitter reduction technique
11/04/2004	WO2004095459A2 Magnetoresistive ram device and methods for fabricating
11/04/2004	US20040221097 Destructive-read random access memory system buffered with destructive-read memory cache
11/04/2004	US20040221095 Method and apparatus for memory control circuit
11/04/2004	US20040219745 Memory device for reducing skew of data and address
11/04/2004	US20040218461 Semiconductor device for domain crossing
11/04/2004	US20040218460 Synchronous memory device for preventing erroneous operation due to DQS ripple
11/04/2004	US20040218458 Integrated dynamic memory having a control circuit for controlling a refresh mode for memory cells
11/04/2004	US20040218457 Memory architecture with single-port cell and dual-port (read and write) functionality
11/04/2004	US20040218456 Semiconductor memory device
11/04/2004	US20040218455 Semiconductor memory device
11/04/2004	US20040218444 Semiconductor memory with wordline timing
11/04/2004	US20040218442 Word line driver for negative voltage
11/04/2004	US20040218437 Semiconductor device that enables simultaneous read and write/read operation
11/04/2004	US20040218425 Method and circuit for elastic storing capable of adapting to high-speed data communications
11/04/2004	US20040218418 Method for writing to multiple banks of a memory device
11/04/2004	US20040218415 System and method for negative word line driver circuit
11/04/2004	US20040218227 Storage device
11/04/2004	US20040217776 Semiconductor integrated circuit including first and second switching transistors having operation states corresponding to operation states of first and second logic circuits
11/04/2004	CA2520139A1 Asynchronous jitter reduction technique
11/03/2004	EP1473738A1 A full-swing wordline driving circuit for a nonvolatile memory
11/03/2004	CN1543651A Memory circuit with memory elements overlying driver cells
11/03/2004	CN1543555A Function switching method, function switching apparatus, data storage method, data storage apparatus, device, and air conditioner
11/03/2004	CN1542971A 半导体存储装置 The semiconductor memory device
11/03/2004	CN1542964A 半导体存储设备 The semiconductor memory device
11/03/2004	CN1542861A Integrated circuit devices having improved duty cycle correction and methods of operating the same
11/03/2004	CN1542852A Data input unit of synchronous semiconductor memory device, and data input method using the same
11/03/2004	CN1542842A 存储设备 Storage devices
11/03/2004	CN1174428C Space-efficient semiconductor memory having hierarchical column select line architecture

1 ... 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 ... 194