Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
11/2004
11/02/2004US6813741 Address counter test mode for memory device
11/02/2004US6813696 Semiconductor memory device and method of controlling the same
11/02/2004US6813677 Memory decoder and method of operation
11/02/2004US6813216 Method for discharging word line and semiconductor memory device using the same
11/02/2004US6813215 Memory having multiple write ports and method of operation
11/02/2004US6813211 Fully hidden refresh dynamic random access memory
11/02/2004US6813197 DLL driving circuit for use in semiconductor memory device
11/02/2004US6813195 Pipe latch circuit for outputting data with high speed
11/02/2004US6813188 Non-volatile semiconductor memory device having a memory cell which stably retains information
11/02/2004US6813185 Non-volatile semiconductor memory device and semiconductor disk device
11/02/2004US6813181 Circuit configuration for a current switch of a bit/word line of a MRAM device
10/2004
10/28/2004WO2004093091A1 Nonvolatile semiconductor storage device
10/28/2004WO2004092966A1 A virtual dual-port synchronous ram architecture
10/28/2004WO2004092904A2 Memory system having a multiplexed high-speed channel
10/28/2004US20040216006 Semiconductor memory device capable of accessing all memory cells
10/28/2004US20040213074 Method and apparatus for establishing and maintaining desired read latency in high-speed DRAM
10/28/2004US20040213073 Data input unit of synchronous semiconductor memory device, and data input method using the same
10/28/2004US20040213071 Magneto-resistive element
10/28/2004US20040213052 Asynchronous, high-bandwidth memory component using calibrated timing elements
10/28/2004US20040212608 Display driver, electro-optical device, and electronic appliance
10/28/2004US20040212014 Semiconductor integrated circuit, semiconductor non-volatile memory, memory card, and microcomputer
10/28/2004DE10230949B4 Integrierter Mikrocontroller-Baustein und Verfahren zur Funktionsüberprüfung eines integrierten Speichers des Mikrocontroller-Bausteins Integrated microcontroller module and method for functional verification of an integrated memory of the microcontroller block
10/27/2004CN1541393A Voltage boost circuit using supply voltage detection to compensate for suuply voltage variations in read mode voltages
10/26/2004US6810449 Protocol for communication with dynamic memory
10/26/2004US6809990 Delay locked loop control circuit
10/26/2004US6809989 Semiconductor storage device
10/26/2004US6809987 Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
10/26/2004US6809986 System and method for negative word line driver circuit
10/26/2004US6809984 Multiport memory circuit composed of 1Tr-1C memory cells
10/26/2004US6809981 Wordline driven method for sensing data in a resistive memory array
10/26/2004US6809965 Control circuitry for a non-volatile memory
10/26/2004US6809954 Circuit and method for reducing access transistor gate oxide stress
10/26/2004US6809947 Multi-level semiconductor memory architecture and method of forming the same
10/26/2004US6809946 Semiconductor memory device and method of controlling the same
10/21/2004US20040210733 Integrated circuit having a memory cell array capable of simultaneously performing a data read operation and a data write operation
10/21/2004US20040208163 Packet based transmission of multiple data signals
10/21/2004US20040208077 Semiconductor memory device and layout method thereof
10/21/2004US20040208069 Column repair circuit
10/21/2004US20040208064 Method of controlling an integrated circuit capable of simultaneously performing a data read operation and a data write operation
10/21/2004US20040208059 Flash memory device capable of preventing program disturbance according to partial programming
10/21/2004US20040208037 Distributed, highly configurable modular predecoding
10/20/2004EP1468423A2 Array-based architecture for molecular electronics
10/20/2004EP1468422A1 Pcram rewrite prevention
10/20/2004CN1539147A Random-access memory devices comprising deoded buffer
10/20/2004CN1172314C Semiconductor memory
10/19/2004US6807598 Integrated circuit device having double data rate capability
10/19/2004US6807124 Memory device for activating one cell by specifying block and memory cell in the block
10/19/2004US6807120 Dynamic random access memory (DRAM) capable of canceling out complementary noise developed in plate electrodes of memory cell capacitors
10/19/2004US6807114 Method and system for selecting redundant rows and columns of memory cells
10/19/2004US6807112 Mask programmable read only memory
10/19/2004US6807100 Nonvolatile semiconductor memory device and data write method thereof
10/14/2004WO2004029981A3 Multi-port memory cells
10/14/2004US20040202040 Virtual dual-port synchronous RAM architecture
10/14/2004US20040202039 Programmable delay for self-timed-margin
10/14/2004US20040202037 Nonvolatile semiconductor memory device
10/14/2004US20040202036 High speed DRAM architecture with uniform access latency
10/14/2004US20040201406 Ring-resister controlled DLL with fine delay line and direct skew sensing detector
10/14/2004DE69333549T2 Halbleiterspeicheranordnung A semiconductor memory device
10/13/2004EP1467379A1 Semiconductor memory device capable of accessing all memory cells
10/13/2004CN1537280A Adaptive throttling memory accesses, such as throttling RDRAm accesses in real-time system
10/13/2004CN1536491A Address volume connection function for addressable storage equipment
10/12/2004US6804162 Read-modify-write memory using read-or-write banks
10/12/2004US6804143 Write-assisted SRAM bit cell
10/12/2004US6804138 Addressing of memory matrix
10/07/2004US20040196731 Semiconductor integrated ciruit device
10/07/2004US20040196729 Method and system for accelerating coupling digital signals
10/07/2004US20040196726 Dense content addressable memory cell
10/07/2004US20040196723 Dynamically mapping block-alterable memories
10/07/2004US20040196712 Semiconductor memory device
10/07/2004US20040196691 Memory device having different burst order addressing for read and write operations
10/07/2004US20040196093 Fast, accurate and low power supply voltage booster using a/d converter
10/06/2004EP1464056A1 Memory controller with ac power reduction through non-return-to idle of address and control signals
10/06/2004CN1534683A Method of detecting non volatile storage medium logic address
10/06/2004CN1534428A Semiconductor integrated circuit apparatus
10/05/2004US6801980 Destructive-read random access memory system buffered with destructive-read memory cache
10/05/2004US6801979 Method and apparatus for memory control circuit
10/05/2004US6801472 RDLL circuit for area reduction
10/05/2004US6801460 Semiconductor memory device suppressing peak current
10/05/2004US6801144 Semiconductor memory device inputting/outputting data synchronously with clock signal
09/2004
09/30/2004WO2004084226A1 Simultaneous reading from and writing to different memory cells
09/30/2004WO2004084225A1 Method and apparatus for establishing and maintaining desired read latency in high-speed dram
09/30/2004WO2003060687A3 Device for storing data and method for dividing space for data storing
09/30/2004US20040193741 Priority circuit for content addressable memory
09/30/2004US20040190363 Semiconductor memory device
09/30/2004US20040190360 Word line arrangement having multi-layer word line segments for three-dimensional memory array
09/30/2004US20040190359 Apparatus and method for disturb-free programming of passive element memory cells
09/30/2004US20040190355 Semiconductor device and method for testing semiconductor device
09/30/2004US20040190352 Semiconductor memory device
09/30/2004US20040190349 Circuit and method for decreasing the required refresh rate of DRAM devices
09/30/2004US20040190340 Word-line voltage generator
09/30/2004US20040189364 Integrated circuit devices having improved duty cycle correction and methods of operating the same
09/30/2004DE69333557T2 Halbleiterspeicheranordnung A semiconductor memory device
09/30/2004DE69333548T2 Halbleiterspeicheranordnung A semiconductor memory device
09/29/2004EP1462908A2 Semiconductor integrated circuit device
09/29/2004CN1532665A Semiconductor device, semiconductor circuit, electronic device and clock signal supply and control method
09/28/2004US6798713 Implementing software breakpoints
09/28/2004US6798712 Wordline latching in semiconductor memories
09/28/2004US6798711 Memory with address management
09/28/2004US6798700 Methods of reading and/or writing data to memory devices including multiple write circuits and/or virtual ground lines and related devices
09/28/2004US6798696 Method of controlling the operation of non-volatile semiconductor memory chips