Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
02/2004
02/24/2004US6697915 CD-ROM decoder
02/24/2004US6697908 Processor system using synchronous dynamic memory
02/24/2004US6697295 Memory device having a programmable register
02/24/2004US6697284 Flash memory array structure
02/24/2004US6697075 Decoder system capable of performing a plural-stage process
02/24/2004US6696862 Semiconductor memory device input circuit
02/19/2004WO2004015708A1 Disc with temporary disc definition structure (tdds) and temporary defect list (tdfl), and method of and apparatus for managing defect in the same
02/19/2004US20040032790 Semiconductor memory device with efficient buffer control for data buses
02/19/2004US20040032789 Enabling an interim density for top boot flash memories
02/19/2004US20040032779 Semiconductor memory device
02/19/2004US20040031960 Test key and method for validating the position of a word line overlaying a trench capacitor in DRAMS
02/19/2004DE10234679A1 Memory device such as a dram and operating process has unit which only drives busses when an activation signal is active
02/19/2004DE10231954A1 Dynamic RAM component for receiving an external cycle with a clock pulsed period duration has a device to make available information representing the clock pulsed period duration
02/19/2004DE10157836B4 Signalverteilung zu einer Mehrzahl von Schaltungseinheiten Signal distribution to a plurality of circuit units
02/18/2004EP1389781A2 Flash memory device having local decoder circuitry
02/18/2004CN1476596A Device comprising array of pixels allowing storage of data
02/17/2004US6693843 Wordline on and off voltage compensation circuit based on the array device threshold voltage
02/17/2004US6693832 Register circuit of extended mode register set
02/17/2004US6693818 Semiconductor storage apparatus
02/12/2004WO2004013909A1 Semiconductor integrated circuit incorporating memory
02/12/2004US20040030825 Storing device, storing control method and program
02/12/2004US20040027909 Self-synchronous FIFO memory device
02/12/2004US20040027885 Device and method for decoding an address word into word-line signals
02/12/2004US20040027866 Dual bandgap voltage reference system and method for reducing current consumption during a standby mode of operation and for providing reference stability during an active mode of operation
02/12/2004US20040027864 Memory device and operation thereof
02/12/2004US20040027859 Non-volatile semiconductor memory device
02/12/2004US20040027855 Dynamic sub-array group selection scheme
02/12/2004US20040027850 Nonvolatile ferroelectric memory device with split word lines
02/12/2004DE10307272A1 Speichervorrichtung zur Aktivierung einer Zelle durch Spezifizieren eines Blocks und einer Speicherzelle in dem Block Memory device for activation of a cell by specifying a block and a memory cell in the block
02/12/2004DE10136544B4 Integrierter dynamischer Speicher und Betriebsverfahren Integrated dynamic memory and operating procedures
02/11/2004CN1474457A Non-volatile semiconductor storage device
02/11/2004CN1474455A Semiconductor storage element and its operation method and semiconductor memory array
02/10/2004US6691206 Processor interfacing to memory-centric computing engine
02/10/2004US6691142 Pseudo random address generator for 0.75M cache
02/10/2004US6690606 Asynchronous interface circuit and method for a pseudo-static memory device
02/10/2004US6690596 Pattern layout of transfer transistors employed in a row decoder
02/10/2004US6689622 Magnetoresistive memory or sensor devices having improved switching properties and method of fabrication
02/05/2004US20040022271 Signal generation and broadcasting
02/05/2004US20040022117 Memory device and method of operating the memory device
02/05/2004US20040022116 Method and apparatus for saving current in a memory device
02/05/2004US20040022111 Memory architecture for increased speed and reduced power consumption
02/05/2004US20040022100 Semiconductor memory having a configuration of memory cells
02/05/2004US20040022091 Semiconductor device
02/05/2004DE10161042B4 Verfahren zum Betreiben eines Halbleiterspeichers und Halbleiterspeicher A method of operating a semiconductor memory and semiconductor memory
02/04/2004CN1472746A Double port static memory unit and semiconductor device therewith
02/03/2004US6687184 Memory device having selectable clock input and method for operating same
02/03/2004US6687182 Semiconductor memory device
02/03/2004US6687181 Semiconductor memory device with less data transfer delay time
02/03/2004US6687180 Driver control circuit
02/03/2004US6687169 Semiconductor memory device for providing address access time and data access time at a high speed
02/03/2004US6687159 Method of programming a plurality of memory cells connected in parallel, and a programming circuit therefor
02/03/2004US6687148 High performance embedded semiconductor memory devices with multiple dimension first-level bit-lines
02/03/2004US6687146 Interleaved wordline architecture
01/2004
01/29/2004US20040019756 Memory device supporting a dynamically configurable core organization
01/29/2004US20040019748 Memory controller which increases bus bandwidth, data transmission method using the same, and computer system having the same
01/29/2004US20040019738 Adaptive throttling of memory accesses, such as throttling RDRAM accesses in a real-time system
01/29/2004US20040017727 Dual array read port functionality from a one port SRAM
01/29/2004US20040017716 Dynamic RAM-and semiconductor device
01/29/2004US20040017702 Storage element with a defined number of write cycles
01/29/2004US20040017700 Method and apparatus for synchronization of row and column access operations
01/29/2004US20040017699 Semiconductor memory device in which data are read and written asynchronously with application of address signal
01/29/2004US20040017697 Data memory address generation for time-slot interchange switches
01/29/2004US20040016951 Semiconductor device and manufacturing method thereof
01/29/2004DE10330920A1 Statische Speicherzelle mit Dual-Port und zugehöriger Halbleiterspeicherbaustein Static memory cell having dual-port semiconductor memory device and associated
01/29/2004DE10234945B3 Halbleiterspeicher mit einer Anordnung von Speicherzellen A semiconductor memory comprising an array of memory cells
01/29/2004DE10207300B4 Integrierter Festwertspeicher, Verfahren zum Betreiben eines solchen Festwertspeichers sowie Herstellungsverfahren Built-only memory, method of operating such a read-only memory and manufacturing method
01/28/2004CN1471670A Storing device, storing control method and program
01/28/2004CN1470994A 半导体装置 Semiconductor device
01/27/2004US6684345 Flash EEprom system
01/27/2004US6684291 Interface for a memory, and method for variable configuration of a memory apparatus
01/27/2004US6684285 Synchronous integrated circuit device
01/27/2004US6683816 Access control system for multi-banked DRAM memory
01/27/2004US6683808 String programmable nonvolatile memory with NOR architecture
01/27/2004US6683807 Thin film magnetic memory device for programming required information with an element similar to a memory cell and information programming method
01/27/2004US6683602 Display control apparatus and electronic appliance
01/27/2004US6683372 Memory expansion module with stacked memory packages and a serial storage unit
01/22/2004WO2004008536A1 Magnetic non-volatile memory element
01/22/2004WO2003025940A3 Register bank
01/22/2004US20040015663 Circuit for generating column selection control signal in memory device
01/22/2004US20040015640 Internal voltage level control circuit, semiconductor storage, and method for controlling them
01/22/2004US20040014243 Magnetoresistive memory or sensor devices having improved switching properties and method of fabrication
01/22/2004US20040013024 Circuits for controlling internal power supply voltages provided to memory arrays based on requested operations and methods of operating
01/22/2004US20040013010 Column address path circuit and method for memory devices having a burst access mode
01/22/2004US20040012437 Boosting circuit
01/22/2004DE10230949A1 Integrierter Mikrocontroller-Baustein und Verfahren zur Funktionsüberprüfung eines integrierten Speichers des Mikrocontroller-Bausteins Integrated microcontroller module and method for functional verification of an integrated memory of the microcontroller block
01/22/2004DE10228128A1 Verfahren zur Speicherung von Daten, Verfahren zum Lesen von Daten, Vorrichtung zur Speicherung von Daten und Vorrichtung zum Lesen von Daten A method for storage of data, method of reading data, means for storing of data and apparatus for reading data
01/21/2004EP1382043A2 Method and apparatus for off boundary memory access
01/21/2004CN1469483A Semiconductor storing device and semiconductor device
01/21/2004CN1469471A Integated circuit storing equipment
01/21/2004CN1469380A Memory device
01/21/2004CN1135498C Synchronous counter and its carry propagating method
01/20/2004US6681286 Control chipset having dual-definition pins for reducing circuit layout of memory slot
01/20/2004US6680875 Semiconductor device, such as a synchronous DRAM, including a control circuit for reducing power consumption
01/20/2004US6680874 Delay lock loop circuit useful in a synchronous system and associated methods
01/20/2004US6680869 Semiconductor device
01/20/2004US6680863 MRAM memory array having merged word lines
01/20/2004US6680736 Graphic display systems having paired memory arrays therein that can be row accessed with 2(2n) degrees of freedom
01/15/2004WO2004006263A1 System and method for efficient chip select expansion
01/15/2004WO2004006261A2 Wordline latching in semiconductor memories
01/15/2004US20040008566 Latency control circuit and method of latency control