| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 01/15/2004 | US20040008565 Spatially-spectrally swept optical memories and addressing methods |
| 01/15/2004 | US20040008564 Memory device for activating one cell by specifying block and memory cell in the block |
| 01/15/2004 | US20040008563 Semiconductor memory device with reduced power consumption |
| 01/15/2004 | US20040008547 Semiconductor memory device with structure providing increased operating speed |
| 01/15/2004 | US20040008544 Semiconductor memory |
| 01/14/2004 | EP1381057A1 Line selector for a matrix of memory elements |
| 01/14/2004 | EP1381054A1 Organic memory device |
| 01/14/2004 | EP1381053A2 Device and method for selecting power down exit |
| 01/14/2004 | CN1468435A Flash memory architecture employing three layer metal interconnect |
| 01/14/2004 | CN1467752A Nonvolatile semiconductor memory device and data write method thereof |
| 01/13/2004 | US6678823 Methods and apparatus for authenticating data stored in semiconductor memory cells |
| 01/13/2004 | US6678206 Semiconductor memory device including standby mode for reducing current consumption of delay locked loop |
| 01/13/2004 | US6677804 Dual bandgap voltage reference system and method for reducing current consumption during a standby mode of operation and for providing reference stability during an active mode of operation |
| 01/13/2004 | US6677782 Semiconductor integrated circuit and semiconductor logic circuit used in the integrated circuit |
| 01/08/2004 | WO2004003764A1 Method and apparatus for optimizing timing for a multi-drop bus |
| 01/08/2004 | US20040006676 Method for bus capacitance reduction |
| 01/08/2004 | US20040006675 Method for bus capacitance reduction |
| 01/08/2004 | US20040006664 System and method for efficient chip select expansion |
| 01/08/2004 | US20040004975 Method and system for nesting of communications packets |
| 01/08/2004 | US20040004901 Wordline latching in semiconductor memories |
| 01/08/2004 | US20040004899 Word line driving circuit |
| 01/08/2004 | US20040004898 Dual port static memory cell and semiconductor memory device having the same |
| 01/08/2004 | US20040004897 Layout structures of data input/output pads and peripheral circuits of integrated circuit memory devices |
| 01/08/2004 | US20040004890 Semiconductor memory device and method of controlling the same |
| 01/08/2004 | US20040004887 Volumetric data storage apparatus |
| 01/08/2004 | US20040004875 Semiconductor device |
| 01/08/2004 | US20040004869 Semiconductor device |
| 01/08/2004 | US20040004860 Column decode circuit for high density/high performance memories |
| 01/07/2004 | EP1378913A1 Voltage booster device and memory system |
| 01/07/2004 | CN1466764A Internal voltage level control circuit semiconductor memory device and their control method |
| 01/07/2004 | CN1134013C Indicator circuit with small placeholder, high speed and low power dissipation |
| 01/06/2004 | USRE38379 Semiconductor memory with alternately multiplexed row and column addressing |
| 01/06/2004 | US6675273 Memory circuitry with auxiliary word line to obtain predictable array output when an invalid address is requested |
| 01/06/2004 | US6675272 Method and apparatus for coordinating memory operations among diversely-located memory components |
| 01/06/2004 | US6674684 Multi-bank chip compatible with a controller designed for a lesser number of banks and method of operating |
| 01/06/2004 | US6674682 Architecture, method(s) and circuitry for low power memories |
| 01/06/2004 | US6674677 Memory device tester and method for testing reduced power states |
| 01/06/2004 | US6674670 Methods of reading and/or writing data to memory devices including virtual ground lines and/ or multiple write circuits and related devices |
| 01/06/2004 | US6674669 Nonvolatile memory structures and access methods |
| 01/06/2004 | US6674668 Read circuit on nonvolatile semiconductor memory |
| 01/06/2004 | US6674667 Programmable fuse and antifuse and method therefor |
| 01/06/2004 | US6674663 Nonvolatile storage device and operating method thereof |
| 01/06/2004 | US6674314 Interpolating circuit, DLL circuit and semiconductor integrated circuit |
| 01/02/2004 | EP1376597A2 Distributed, highly configurable modular address predecoder |
| 01/02/2004 | EP1376596A2 Synchronous global controller for enhanced pipeline |
| 01/02/2004 | EP1374248A2 Very small swing and low voltage cmos static memory |
| 01/02/2004 | EP1374243A2 System and method for achieving fast switching of analog voltages on a large capacitive load |
| 01/02/2004 | EP1374242A1 Storing an unchanging binary code in an integrated circuit |
| 01/02/2004 | EP1266382B1 Trimming method and system for wordline booster to minimize process variation of boosted wordline voltage |
| 01/01/2004 | US20040003331 Method and apparatus for optimizing timing for a multi-drop bus |
| 01/01/2004 | US20040001356 Semiconductor memory |
| 01/01/2004 | US20040000934 Clock divider and method for dividing clock signal in DLL circuit |
| 01/01/2004 | US20040000932 Decoding circuit for wafer burn-in test |
| 12/31/2003 | WO2004001604A1 Method for addressing memories that can be deleted in blocks |
| 12/31/2003 | WO2003083669A3 Inexact addressable digital memory |
| 12/31/2003 | WO2003046990A3 Method and apparatus for standby power reduction in semiconductor devices |
| 12/31/2003 | CN1465095A High-speed low-power semiconductor memory architecture |
| 12/30/2003 | US6671787 Semiconductor memory device and method of controlling the same |
| 12/30/2003 | US6671210 Three-transistor pipelined dynamic random access memory |
| 12/25/2003 | US20030235106 Delay locked loop control circuit |
| 12/25/2003 | US20030235105 Semiconductor integrated circuit |
| 12/25/2003 | US20030235096 High density mask ROM having flat-type bank select |
| 12/25/2003 | US20030235091 Semiconductor device without adverse effects caused by inclinations of word line and bit line |
| 12/25/2003 | US20030234408 Nonvolatile semiconductor memory device and data write method thereof |
| 12/24/2003 | WO2003107353A1 Row decoder circuit for use in programming a memory device |
| 12/24/2003 | WO2003015101A3 Random-access memory devices comprising a dioded buffer |
| 12/24/2003 | CN1132188C Semiconductor memory device having plurality of banks |
| 12/24/2003 | CA2489766A1 Row decoder circuit for use in programming a memory device |
| 12/23/2003 | US6667933 Semiconductor memory and method of operating the same |
| 12/23/2003 | US6667930 System and method for optimizing performance in a four-bank SDRAM |
| 12/23/2003 | US6667905 Semiconductor integrated circuit |
| 12/23/2003 | US6667894 Acquisition process by analog signal sampling, and an acquisition system to implement such a process |
| 12/23/2003 | US6667744 High speed video frame buffer |
| 12/18/2003 | WO2002071407A3 Asynchronous, high-bandwidth memory component using calibrated timing elements |
| 12/18/2003 | WO2002063503A3 System and method for storing and retrieving medical images and records |
| 12/18/2003 | US20030231521 Semiconductor memory device and semiconductor device |
| 12/18/2003 | DE10227256C1 Addressing blockwise erasable memories involves checking flag memory per address conversion in connection with sector write command leading to written sector to determine if block address present |
| 12/17/2003 | EP1158526B1 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics |
| 12/17/2003 | CN1462074A Semiconductor storage device |
| 12/17/2003 | CN1462038A Nonvolatile memory and driving method thereof |
| 12/16/2003 | US6665229 Semiconductor memory device row decoder structures having reduced layout area, and methods of operating the same |
| 12/16/2003 | US6665228 Integrated memory having a memory cell array with a plurality of segments and method for operating the integrated memory |
| 12/16/2003 | US6665203 Semiconductor memory device having a hierarchial I/O strucuture |
| 12/16/2003 | US6664806 Memory address and decode circuits with ultra thin body transistors |
| 12/11/2003 | WO2003102960A1 Device for reducing the effects of leakage current within electronic devices |
| 12/11/2003 | WO2003102752A1 Removable storage device |
| 12/11/2003 | US20030227947 Method and system for communicating control information via out-of-band symbols |
| 12/11/2003 | US20030227804 Wear leveling techniques for flash EEPROM systems |
| 12/11/2003 | US20030227800 Semiconductor memory device |
| 12/10/2003 | EP1368829A2 Dram cell having a capacitor structure fabricated partially in a cavity and method for operating same |
| 12/10/2003 | EP1287529B1 MULTI-GENERATOR, PARTIAL ARRAY V t?, TRACKING SYSTEM TO IMPROVE ARRAY RETENTION TIME |
| 12/10/2003 | CN1461010A Semiconductor storage device |
| 12/10/2003 | CN1461008A Circuit device for semiconductor |
| 12/10/2003 | CN1130729C Multi-bank synchronous semiconductor memory device |
| 12/10/2003 | CN1130725C Nonvolatile memory blocking structure |
| 12/10/2003 | CN1130724C Circuit device for generating high output voltage |
| 12/10/2003 | CN1130631C Television or radio control system development method |
| 12/09/2003 | US6662291 Synchronous DRAM System with control data |
| 12/09/2003 | US6662290 Address counter and address counting method |
| 12/09/2003 | US6662278 Adaptive throttling of memory acceses, such as throttling RDRAM accesses in a real-time system |