Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
04/2004
04/20/2004US6724654 Pulsed write techniques for magneto-resistive memories
04/20/2004US6724653 Magnetic random access memory
04/20/2004US6724647 Variable logical circuit, semiconductor integrated circuit, and method for manufacturing semiconductor integrated circuit
04/20/2004US6724245 Boosting circuit
04/15/2004WO2004006261A3 Wordline latching in semiconductor memories
04/15/2004WO2003102752B1 Removable storage device
04/15/2004US20040073770 Access circuit
04/15/2004US20040073745 Bit line segmenting in random access memories
04/15/2004US20040071042 PCRAM rewrite prevention
04/15/2004US20040071041 DSP unit for multi-level global accumulation
04/15/2004US20040071040 Memory module and memory system
04/15/2004US20040071039 Data holding apparatus and data read out method
04/15/2004US20040071038 System and method for storing and retrieving medical images and records
04/15/2004US20040070008 High speed dual-port memory cell having capacitive coupling isolation and layout design
04/15/2004DE10347055A1 Data access method for dynamic random access memory, involves generating page mode enable signal for maintaining activated state of primary word line corresponding to primary address while activating secondary word line
04/15/2004DE10245367A1 Processor with security instructions for sub-program jump command information, has command processing device formed in mother-program at occurrence of sub-program jump command
04/14/2004EP0976133B1 Memory device and method
04/13/2004US6721860 Method for bus capacitance reduction
04/13/2004US6721843 Flash memory architecture implementing simultaneously programmable multiple flash memory banks that are host compatible
04/13/2004US6721232 Semiconductor device having phase error improved DLL circuit mounted thereon
04/13/2004US6721231 Semiconductor memory device, memory system and electronic instrument
04/13/2004US6721228 Semiconductor memory device using a protocol transmission method
04/13/2004US6721227 User selectable banks for DRAM
04/13/2004US6721213 Electronic circuit and semiconductor storage device
04/08/2004WO2004029981A2 Multi-port memory cells
04/08/2004WO2004029980A2 Refresh control circuit for ics with a memory array
04/08/2004WO2002091383A3 A secure poly fuse rom with a power-on or on-reset hardware security features and method therefor
04/08/2004US20040068541 Broadcast and reception, and conditional access system therefor
04/08/2004US20040066700 Circuits and methods for providing page mode operation in semiconductor memory device having partial activation architecture
04/08/2004US20040066699 Information processing device and setting method for same
04/08/2004US20040066698 Semiconductor memory device
04/08/2004US20040066697 Multiport memory circuit composed of 1Tr-1C memory cells
04/08/2004US20040066687 Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
04/08/2004US20040066671 Memory device and method for selectable sub-array activation
04/08/2004US20040066212 Programmable logic array integrated circuits
04/08/2004DE19748023B4 Zeilendecodierer für Halbleiterspeichereinrichtung Row decoder for the semiconductor memory device
04/07/2004EP1406161A2 Information processing device and setting method therefor
04/07/2004EP1405315A2 Method and system for banking register file memory arrays
04/07/2004CN1488145A MRAM bit line word line architecture
04/07/2004CN1145171C Word line control circuit
04/06/2004US6718452 Storage array supporting a plurality of instruction modes
04/06/2004US6717886 Control circuit for an S-DRAM
04/06/2004US6717884 Synchronous memory device with reduced address pins
04/06/2004US6717883 Semiconductor memory for logic-hybrid memory
04/06/2004US6717882 Cell circuit for multiport memory using 3-way multiplexer
04/01/2004WO2002043319A9 Communications architecture for storage-based devices
04/01/2004US20040064674 Apparatus and method for generating memory access signals, and memory accessed using said signals
04/01/2004US20040062135 Semiconductor integrated circuit device and self-test method of memory macro
04/01/2004US20040062134 Semiconductor storage device formed to optimize test technique and redundancy technology
04/01/2004US20040062133 Data transmission system and wearable communications device
04/01/2004US20040062132 Line selector for a matrix of memory elements
04/01/2004US20040062128 Address-counter control system
04/01/2004US20040062122 Method of accessing matrix data with address translation circuit that enables quick serial access in row or column directions
04/01/2004US20040062120 Dram core refresh with reduced spike current
04/01/2004US20040062113 Semiconductor memory device
04/01/2004US20040062098 Non-volatile memory device with erase address register
04/01/2004US20040062089 Memory device
04/01/2004US20040062082 Non-volatile memory device with erase address register
04/01/2004US20040062078 Nonvolatile semiconductor memory device supplying proper program potential
04/01/2004US20040061156 Magnetic random access memory having transistor of vertical structure with writing line formed on an upper portion of the magnetic tunnel junction cell
03/2004
03/31/2004EP1403880A1 Method for detecting a resistive path or a predeterminted potential in non-volatile memory electronic devices
03/31/2004EP1403878A2 Flash eprom intergrated circuit architecture
03/31/2004CN1485917A 半导体集成电路 The semiconductor integrated circuit
03/31/2004CN1485859A Static semiconductor memory device and method of controlling the same
03/31/2004CN1485858A Device and method for selecting power down exit
03/31/2004CN1144228C Semiconductor integrated circuit device
03/31/2004CN1144129C Semiconductor circuit
03/30/2004US6715044 Device and method for controlling solid-state memory system
03/30/2004US6715020 Synchronous integrated circuit device
03/30/2004US6714479 Semiconductor memory and control method
03/30/2004US6714478 Semiconductor memory device having divided word line structure
03/30/2004US6714476 Memory array with dual wordline operation
03/30/2004US6714475 Fast accessing of a memory device using decoded address during setup time
03/30/2004US6714465 Memory device and process for improving the state of a termination
03/30/2004US6714463 Semiconductor memory device having reduced chip select output time
03/30/2004US6714452 Non-volatile semiconductor memory device and semiconductor disk device
03/30/2004US6714447 Semiconductor device and a integrated circuit card
03/30/2004US6714443 Thin film magnetic memory device for writing data of a plurality of bits in parallel
03/30/2004CA2319239C Multi-port random access memory
03/25/2004WO2004025654A2 Multiport sram cell
03/25/2004WO2004025474A1 A memory circuit comprising a non-volatile ram and a ram
03/25/2004US20040060015 Register file and method for designing a register file
03/25/2004US20040057329 Semiconductor memory device
03/25/2004US20040057328 Split gate flash memory cell
03/25/2004US20040057327 Semiconductor memory device
03/25/2004US20040057326 Read circuit of nonvolatile semiconductor memory
03/25/2004US20040057325 Synchronization device for a semiconductor memory device
03/25/2004US20040057324 Semiconductor integrated circuit having controllable internal supply voltage
03/25/2004US20040057323 Organic thin-film switching memory device and memory device
03/25/2004US20040057321 Device for storage of multiport data, particularly for an arithmetic and logic unit of a digital signal processing processor
03/25/2004US20040057317 Low power memory module using restricted device activation
03/25/2004US20040057315 Refresh control circuit for ICs with a memory array
03/25/2004US20040057306 Non-volatile memory device with erase address register
03/25/2004US20040057278 Magnetic random access memory
03/25/2004US20040057277 Magnetic random access memory
03/25/2004US20040056687 Complementary input dynamic muxed-decoder
03/25/2004US20040056686 Complementary input dynamic logic
03/25/2004US20040056685 Complementary input dynamic logic for complex logic functions
03/24/2004EP1290559B1 Dual-ported cams for a simultaneous operation flash memory
03/24/2004CN1484313A Semiconductor menory having configuartion of memory cells