Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
06/2004
06/22/2004US6754102 Method for programming a three-dimensional memory array incorporating serial chain diode stack
06/22/2004US6754096 Apparatus and method for driving ferroelectric memory
06/17/2004US20040114454 Memory device and method for operating same
06/17/2004US20040114453 Semiconductor memory device inputting/outputting data synchronously with clock signal
06/17/2004US20040114452 Structure memory transfer device
06/17/2004US20040114450 Constellation mapping apparatus and method
06/17/2004US20040114433 Programmable fuse and antifuse and method therefor
06/17/2004US20040113139 Sublithographic nanoscale memory architecture
06/17/2004US20040113138 Stochastic assembly of sublithographic nanoscale interfaces
06/17/2004DE10354523A1 Semiconductor memory device for electronic equipment, has memory cell array divided into blocks and control circuit selectively controlling wordline control circuit to activate wordlines with same row address to change page length
06/17/2004DE10254155A1 Mask programmable rom for digital information storage and production process with two memory cell transistors and two row select potential adjusters between them
06/16/2004EP1429342A1 MRAM having NAND structure
06/16/2004EP1428222A2 Background operation for memory cells
06/16/2004EP1158534B1 Semiconductor memory device
06/16/2004CN1505055A Nonvolatile memory device having circuit for stably supplying desired current during data writing
06/16/2004CN1505047A Semiconductor storage apparatus
06/15/2004US6751716 Semiconductor storage device, control device, and electronic apparatus
06/15/2004US6751696 Memory device having a programmable register
06/15/2004US6751160 Memory control with burst-access capability
06/15/2004US6751154 Semiconductor memory device
06/15/2004US6751153 Non-volatile semiconductor memory device and information apparatus
06/15/2004US6751151 Ultra high-speed DDP-SRAM cache
06/15/2004US6751144 Semiconductor storage and method for testing the same
06/15/2004US6751131 Semiconductor storage device and information apparatus
06/15/2004US6751122 Nonvolatile semiconductor memory device
06/15/2004US6751112 Dense content addressable memory cell
06/15/2004US6750692 Circuit and method for generating internal clock signal
06/10/2004US20040111571 Semiconductor storage
06/10/2004US20040109383 Semiconductor device having a power down mode
06/10/2004US20040109381 Method and apparatus for accessing a memory core multiple times in a single clock cycle
06/10/2004US20040109379 Method of marginal erasure for the testing of flash memories
06/10/2004US20040109378 Disc with temporary disc definition structure (TDDS) and temporary defect list (TDFL), and method of and apparatus for managing defect in the same
06/10/2004US20040109377 Nonvolatile memory device having circuit for stably supplying desired current during data writing
06/10/2004US20040109376 Method for detecting logical address of flash memory
06/10/2004US20040109340 Nonvolatile ferroelectric memory device
06/09/2004EP1425753A2 Memory circuit
06/09/2004EP1425752A2 A secure poly fuse rom with a power-on or on-reset hardware security features and method therefor
06/09/2004EP1158536B1 Semiconductor memory device
06/09/2004EP1158532B1 Semiconductor memory device
06/09/2004CN1503975A Method and apparatus for off boundary memory access
06/09/2004CN1503272A Circuit and method for changing page length in semiconductor memory
06/09/2004CN1503267A Pipe line latch circuit for high speed output data
06/09/2004CN1503229A Magneto-resistance effect element, magnetic memory and magnetic head
06/09/2004CN1153466C Transmission and reception of television programmes and other data
06/09/2004CN1153465C Method and apparatus for preventing fraudulent access in conditional access system
06/09/2004CN1153220C Semi-conductor storage device
06/08/2004US6748483 Process of operating a DRAM system
06/08/2004US6747912 Implied precharge and posted activate command to reduce command bandwidth
06/08/2004US6747909 Decoding apparatus for semiconductor memory device, and enable method therefore
06/08/2004US6747908 Semiconductor memory device and method of selecting word line thereof
06/08/2004US6747903 Configurable decoder for addressing a memory
06/08/2004US6747899 Method and apparatus for multiple byte or page mode programming of a flash memory array
06/08/2004US6747898 Column decode circuit for high density/high performance memories
06/08/2004US6747895 Nonvolatile semiconductor memory, data deletion method of nonvolatile semiconductor memory, information processing apparatus and nonvolatile semiconductor memory system
06/08/2004US6747509 Semiconductor integrated circuit
06/08/2004US6747305 Memory address decode array with vertical transistors
06/03/2004US20040105363 Disc with temporary disc definition structure (TDDS) and temporary defect list (TDFL), and method of and apparatus for managing defect in the same
06/03/2004US20040105338 Synchronous controlled, self-timed local SRAM block
06/03/2004US20040105337 Semiconductor integrated circuit
06/03/2004US20040105336 Range selectable address decoder and frame memory device for processing graphic data at high speed using the same
06/03/2004US20040105299 Storage array such as a SRAM with reduced power requirements
06/03/2004DE4326134B4 Eingangswechseldetektorschaltung AC input detector circuit
06/02/2004EP1424635A1 Non volatile memory device architecture, for instance a flash kind, having a serial communication interface
06/02/2004CN1501503A Nonvolatile memory device utilizing a vertical nanotube
06/02/2004CN1501501A Semiconductor device and method of fabricating same
06/02/2004CN1501292A High-level synthesis method for producing the explanation of digital circuit
06/02/2004CN1152421C Method for testing circuit
06/01/2004US6745302 Method and circuit for enabling a clock-synchronized read-modify-write operation on a memory array
06/01/2004US6745275 Feedback system for accomodating different memory module loading
06/01/2004US6744685 Semiconductor device, method for refreshing the same, and electronic equipment
06/01/2004US6744676 DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating same
06/01/2004US6744656 Semiconductor device and process for manufacturing the same
05/2004
05/27/2004US20040100855 Magneto-resistance effect element, magnetic memory and magnetic head
05/27/2004US20040100854 Data access arrangement utilizing a serialized digital data path across an isolation barrier
05/27/2004US20040100853 Address buffer and semiconductor memoey device using the same
05/27/2004US20040100852 Tree decoder structure particularly well-suited to interfacing array lines having extremely small layout pitch
05/27/2004US20040100312 DLL circuit
05/27/2004DE69333263T2 Nichtflüchtiger Halbleiterspeicher mit elektrisch und gemeinsam löschbaren Eigenschaften A non-volatile semiconductor memory having electrically and collectively erasable characteristics
05/27/2004DE10342998A1 Semiconductor component, typically lower electrode of capacitor in semiconductor memory, for memory miniaturizing using 3D capacitor, with several capacitor contact plugs between two
05/27/2004DE10202272B4 Speichereinrichtung mit den Funktionsauswahlanschlussbereichen der Speicherbausteine zuführbaren Auswahl- bzw. Funktionsauswahlsignalen zur Steuerung deren Terminierung und Verfahren zu deren Betrieb Memory means having the function selection terminal regions of the memory blocks feedable selection or function selection signals for controlling the timing and method for its operation
05/26/2004EP1422722A1 Synchronous semiconductor storage device module and its control method, information device
05/26/2004EP1421701A2 Method for reproducing multimedia files in a terminal
05/26/2004CN1499639A Semiconductor memory with effectively designed inner wiring
05/26/2004CN1499524A Semiconductor memory able to process at high speed
05/25/2004US6742088 Device containing a multi-port memory
05/25/2004US6741520 Integrated data input sorting and timing circuit for double data rate (DDR) dynamic random access memory (DRAM) devices
05/25/2004US6741517 Four port RAM cell
05/25/2004US6741513 Data memory with a plurality of memory banks
05/25/2004US6741509 Semiconductor storage device formed to optimize test technique and redundancy technology
05/25/2004US6741502 Background operation for memory cells
05/25/2004US6741497 Flash memory with RDRAM interface
05/25/2004US6741487 Semiconductor memory
05/25/2004US6740981 Semiconductor device including memory unit and semiconductor module including memory units
05/25/2004US6740929 Semiconductor device and method for testing semiconductor device
05/21/2004WO2004042821A1 Semiconductor memory
05/21/2004WO2004042559A2 Processor with explicit information on information to be secured in sub-program branches
05/21/2004WO2004025654A3 Multiport sram cell
05/20/2004US20040095837 Nonvolatile memory device utilizing a vertical nanotube
05/20/2004US20040095836 Semiconductor memory device and layout method of the same
05/20/2004US20040095835 Circuits and methods for changing page length in a semiconductor memory device