Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
10/2000
10/31/2000US6141256 Differential flash memory cell and method for programming same
10/31/2000US6141253 Electrically programmable semiconductor device with concurrent program and verification operations
10/31/2000US6141250 Non-volatile semiconductor memory device
10/31/2000US6141246 Memory device with sense amplifier that sets the voltage drop across the cells of the device
10/31/2000US6141244 Multi level sensing of NAND memory cells by external bias current
10/31/2000US6141242 Low cost mixed memory integration with substantially coplanar gate surfaces
10/31/2000US6141241 Universal memory element with systems employing same and apparatus and method for reading, writing and programming same
10/31/2000US6141240 Apparatus and method for static random access memory array
10/31/2000US6141239 Static memory cell
10/31/2000US6141238 Dynamic random access memory (DRAM) cells with repressed ferroelectric memory methods of reading same, and apparatuses including same
10/31/2000US6141237 Ferroelectric non-volatile latch circuits
10/31/2000US6141236 Interleaved stitch using segmented word lines
10/31/2000US6140862 Semiconductor circuit device having internal power supply circuit
10/31/2000US6140855 Dynamic-latch-receiver with self-reset pointer
10/31/2000US6140844 Amplifier
10/31/2000US6140838 High density and high speed magneto-electronic logic family
10/31/2000US6140835 Input buffer circuit
10/31/2000US6140834 Semiconductor integrated circuit
10/31/2000US6140805 Source follower NMOS voltage regulator with PMOS switching element
10/31/2000US6140704 Integrated circuit memory devices with improved twisted bit-line structures
10/31/2000US6140181 Memory using insulator traps
10/31/2000US6140157 Memory device using movement of protons
10/31/2000US6140139 Hall effect ferromagnetic random access memory device and its method of manufacture
10/26/2000DE19916913A1 Semiconductor memory device with memory banks configuration
10/26/2000CA2306002A1 Semiconductor memory cell
10/25/2000EP1046993A1 Semiconductor memory with Built-In Self Test
10/25/2000EP1046992A2 Semiconductor RAM with two level bus system
10/25/2000EP1046172A1 Device containing a multi-port memory
10/25/2000EP1046049A1 Device comprising a first and a second ferromagnetic layer separated by a non-magnetic spacer layer
10/25/2000EP1046045A2 Method for detecting a current of spin polarized electrons in a solid body
10/25/2000EP1046040A1 Electronic component
10/25/2000CN1271168A All-metal quantum dot single-electron memory
10/24/2000US6138214 Synchronous dynamic random access memory architecture for sequential burst mode
10/24/2000US6138205 Burst mode type semiconductor memory device
10/24/2000US6137746 High performance random access memory with multiple local I/O lines
10/24/2000US6137744 Memory device with reduced power consumption
10/24/2000US6137743 Semiconductor memory device with reduced consumption of standby current in refresh mode
10/24/2000US6137742 Semiconductor memory device having self-refresh control circuit
10/24/2000US6137740 Semiconductor memory device configured with I/O separation
10/24/2000US6137739 Multilevel sensing circuit and method thereof
10/24/2000US6137737 Method and circuit for rapidly equilibrating paired digit lines of a memory device during testing
10/24/2000US6137736 Semiconductor memory device
10/24/2000US6137735 Column redundancy circuit with reduced signal path delay
10/24/2000US6137732 Semiconductor memory device having voltage boosting circuit
10/24/2000US6137731 Semiconductor memory including an intermediate potential circuit capable of providing reduced current flow
10/24/2000US6137726 Multi-level memory devices having memory cell referenced word line voltage generations
10/24/2000US6137724 Memory device that utilizes single-poly EPROM cells with CMOS compatible programming voltages
10/24/2000US6137723 Memory device having erasable Frohmann-Bentchkowsky EPROM cells that use a well-to-floating gate coupled voltage during erasure
10/24/2000US6137722 Memory array having Frohmann-Bentchkowsky EPROM cells with a reduced number of access transistors
10/24/2000US6137721 Memory device having erasable frohmann-bentchkowsky EPROM cells that use a plate-to-floating gate coupled voltage during erasure
10/24/2000US6137719 Nonvolatile semiconductor memory device storing multi-bit data
10/24/2000US6137718 Method for operating a non-volatile memory cell arrangement
10/24/2000US6137716 Memory system using multiple storage mechanisms to enable storage and retrieval of more than two states in a memory cell
10/24/2000US6137715 Static random access memory with rewriting circuit
10/24/2000US6137714 Dynamic memory cell for a programmable logic device
10/24/2000US6137713 Semiconductor storage device
10/24/2000US6137712 Ferroelectric memory configuration
10/24/2000US6137711 Ferroelectric random access memory device including shared bit lines and fragmented plate lines
10/24/2000US6137348 Semiconductor device for generating two or more different internal voltages
10/24/2000US6137345 Semiconductor integrated circuit including a boosted potential generating circuit
10/24/2000US6137343 Semiconductor memory device equipped with voltage generator circuit
10/24/2000US6137342 High efficiency semiconductor substrate bias pump
10/24/2000US6137328 Clock phase correction circuit
10/24/2000US6137327 Delay lock loop
10/24/2000US6137320 Input receiver circuit
10/24/2000US6137316 Integrated circuit with improved off chip drivers
10/24/2000US6136652 Preventing dielectric thickening over a channel area of a split-gate transistor
10/24/2000US6136638 Process technology architecture of embedded DRAM
10/19/2000WO2000062311A1 Magnetic materials
10/19/2000WO2000062301A1 Universal memory element with systems employing same and apparatus and method for reading, writing and programming same
10/19/2000WO2000062166A1 Programmable read-only memory and method for operating said read-only memory
10/19/2000DE19916065A1 Programmierbarer Festwertspeicher und Verfahren zum Betreiben des Festwertspeichers Programmable read-only memory and method for operating the read-only memory
10/19/2000CA2366588A1 Magnetic materials
10/19/2000CA2332867A1 Universal memory element with systems employing same and apparatus and method for reading, writing and programming same
10/18/2000EP1045403A2 Magnetoresistance device
10/18/2000EP1045397A2 Dynamic random access memory circuit having a testing system and method to determine the sensitivity of a sense amplifier
10/18/2000EP1045396A1 Semiconductor memory device
10/18/2000EP0870303B1 High performance universal multi-port internally cached dynamic random access memory system, architecture and method
10/18/2000CN1270696A Memory location arrangement and its use as a magnetic ram and as an associative memory
10/18/2000CN1270393A Dynamic semiconductor memory and semiconductor IC device
10/17/2000US6134681 Semiconductor memory device with spare memory cell
10/17/2000US6134637 Data transfer control of a video memory having a multi-divisional random access memory and a multi-divisional serial access memory
10/17/2000US6134611 System for interface circuit to control multiplexer to transfer data to one of two internal devices and transferring data between internal devices without multiplexer
10/17/2000US6134182 Cycle independent data to echo clock tracking circuit
10/17/2000US6134180 Synchronous burst semiconductor memory device
10/17/2000US6134179 Synchronous semiconductor memory device capable of high speed reading and writing
10/17/2000US6134178 Synchronous semiconductor memory device suitable for merging with logic
10/17/2000US6134174 Semiconductor memory for logic-hybrid memory
10/17/2000US6134172 Apparatus for sharing sense amplifiers between memory banks
10/17/2000US6134171 Semiconductor integrated circuit device having hierarchical power source arrangement
10/17/2000US6134169 Semiconductor memory device
10/17/2000US6134168 Circuit and method for internal refresh counter
10/17/2000US6134167 Reducing power consumption in computer memory
10/17/2000US6134165 High speed sensing of dual port static RAM cell
10/17/2000US6134164 Sensing circuit for a memory cell array
10/17/2000US6134163 Semiconductor memory device with independently operating memory banks
10/17/2000US6134162 Voltage generator with first drive current in test mode and second drive current in normal operation
10/17/2000US6134161 Test circuit and test method for semiconductor memory
10/17/2000US6134154 Semiconductor memory device with several access enabled using single port memory cell
10/17/2000US6134152 Device and method for supplying current to a semiconductor memory to support a boosted voltage within the memory during testing