Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
09/2000
09/08/2000WO2000052696A1 Single conductor inductive sensor for a non-volatile random access ferromagnetic memory
09/07/2000DE19958614A1 Decoding circuit in semiconductor integrated circuit and operational method with selection signal detector
09/07/2000DE10010440A1 Synchronous dynamic memory with random access memory (SDRAM) a process for column access scan (CAS) latency
09/06/2000EP1033721A2 Programmable delay control in a memory
09/06/2000EP1032938A1 Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
09/06/2000CN1265746A Optical logic element and methods for respectively its preparation and optical adressing, as well as the use thereof in optical logic device
09/06/2000CN1265509A Programmable delay control for use in storage
09/05/2000USRE36851 Method and circuit for shortcircuiting data transfer lines and semiconductor memory device having the circuit
09/05/2000US6115828 Method of replacing failed memory cells in semiconductor memory device
09/05/2000US6115783 Integrated circuit
09/05/2000US6115344 Device and method for optical data storage having multiple optical states
09/05/2000US6115323 Semiconductor memory device for storing data with efficient page access of data lying in a diagonal line of a two-dimensional data construction
09/05/2000US6115322 Semiconductor device accepting data which includes serial data signals, in synchronization with a data strobe signal
09/05/2000US6115320 Separate byte control on fully synchronous pipelined SRAM
09/05/2000US6115319 Dynamic RAM having word line voltage intermittently boosted in synchronism with an external clock signal
09/05/2000US6115318 Clock vernier adjustment
09/05/2000US6115317 Semiconductor memory device for masking data by controlling column select line signals
09/05/2000US6115312 Programmable logic device memory cell circuit
09/05/2000US6115311 Semiconductor memory device capable of selecting a plurality of refresh cycle modes
09/05/2000US6115310 Wordline activation delay monitor using sample wordline located in data-storing array
09/05/2000US6115309 Sense amplifier having increased drive current capability
09/05/2000US6115308 Sense amplifier and method of using the same with pipelined read, restore and write operations
09/05/2000US6115307 Method and structure for rapid enablement
09/05/2000US6115304 Semiconductor memory device and method of burn-in testing
09/05/2000US6115301 Semiconductor memory device having defect relieving system using data line shift method
09/05/2000US6115299 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array
09/05/2000US6115298 Semiconductor device with automatic impedance adjustment circuit
09/05/2000US6115296 Semiconductor memory device capable of reducing a leak current flowing through a substrate
09/05/2000US6115295 Efficient back bias (VBB) detection and control scheme for low voltage DRAMS
09/05/2000US6115294 Method and apparatus for multi-bit register cell
09/05/2000US6115290 Mechanism for resetting sense circuitry to a known state in a nonvolatile memory device
09/05/2000US6115285 Device and method for multi-level charge/storage and reading out
09/05/2000US6115284 Memory device with faster write operation
09/05/2000US6115283 Semiconductor device with programming capacitance element
09/05/2000US6115282 Dynamic memory
09/05/2000US6115280 Semiconductor memory capable of burst operation
09/05/2000US6115279 System with meshed power and signal buses on cell array
09/05/2000US6114899 Variable voltage driver circuit using current detector
09/05/2000US6114891 Pulse generating circuit for dynamic random access memory device
09/05/2000US6114885 Integrated driver circuits having independently programmable pull-up and pull-down circuits therein which match load impedance
09/05/2000US6114861 Apparatus for and method of evaluating the polarization characteristic of a ferroelectric capacitor
09/05/2000US6114719 Magnetic tunnel junction memory cell with in-stack biasing of the free ferromagnetic layer and memory array using the cell
09/05/2000US6114056 Magnetic element, and magnetic head and magnetic memory device using thereof
08/2000
08/31/2000WO2000051134A1 Semiconductor device
08/31/2000WO2000051133A1 Method for operating a memory cell array with self-amplifying dynamic memory cells
08/31/2000WO2000051132A1 Full page increment/decrement burst for ddr sdram/sgram
08/30/2000EP1032044A2 Semiconductor memory cell
08/30/2000EP1031992A2 Flash EEPROM system
08/30/2000EP1031991A1 Method for reading a multilevel nonvolatile memory and multilevel nonvolatile memory
08/30/2000EP1031990A2 Reference voltage generator for an integrated circuit such as a dynamic random access memory (DRAM)
08/30/2000EP1031989A1 Semiconductor memory and method for accessing semiconductor memory
08/30/2000EP1031988A1 Method and apparatus for accessing a memory core
08/29/2000USRE36842 Semiconductor memory device for maintaining level of signal line
08/29/2000US6112314 Apparatus and method for detecting over-programming condition in multistate memory device
08/29/2000US6111875 Apparatus and method for disabling external frame forwarding device for use with a network switch
08/29/2000US6111874 Shared address table with source and destination two-pass algorithm
08/29/2000US6111815 Synchronous burst nonvolatile semiconductor memory
08/29/2000US6111814 Synchronous DRAM memory with asynchronous column decode
08/29/2000US6111810 Synchronous semiconductor memory device having burst access mode and multi-bit pre-fetch operation
08/29/2000US6111808 Semiconductor memory device
08/29/2000US6111807 Synchronous semiconductor memory device allowing easy and fast text
08/29/2000US6111806 Memory device with regulated power supply control
08/29/2000US6111805 Power-on-reset circuit for generating a reset signal to reset a DRAM
08/29/2000US6111804 Methods for reducing the effects of power supply distribution related noise
08/29/2000US6111803 Reduced cell voltage for memory device
08/29/2000US6111802 Semiconductor memory device
08/29/2000US6111801 Technique for testing wordline and related circuitry of a memory array
08/29/2000US6111799 Semiconductor memory in which access to broken word line is inhibited
08/29/2000US6111797 DRAM array with gridded sense amplifier power source for enhanced column repair
08/29/2000US6111796 Programmable delay control for sense amplifiers in a memory
08/29/2000US6111795 Memory device having row decoder
08/29/2000US6111794 Memory interface circuit including bypass data forwarding with essentially no delay
08/29/2000US6111790 Non-volatile memory device and refreshing method
08/29/2000US6111784 Magnetic thin film memory element utilizing GMR effect, and recording/reproduction method using such memory element
08/29/2000US6111783 MRAM device including write circuit for supplying word and bit line current having unequal magnitudes
08/29/2000US6111782 Magnetoresistance effect device, and magnetoresistance effect type head, memory device, and amplifying device using the same
08/29/2000US6111781 Magnetic random access memory array divided into a plurality of memory banks
08/29/2000US6111780 Radiation hardened six transistor random access memory and memory device
08/29/2000US6111779 Cell structure for low electric power static RAM
08/29/2000US6111778 Body contacted dynamic memory
08/29/2000US6111777 Ferroelectric memory
08/29/2000US6111757 SIMM/DIMM memory module
08/29/2000US6111722 Magnetoresistance effect element having improved biasing films, and magnetic head and magnetic recording device using the same
08/29/2000US6111457 Internal power supply circuit for use in a semiconductor device
08/29/2000US6111451 Efficient VCCP supply with regulation for voltage control
08/29/2000US6110754 Method of manufacture of a thermal elastic rotary impeller ink jet print head
08/29/2000US6110523 Method of manufacturing a semiconductor memory device
08/24/2000WO2000049659A1 Microelectronic device for storing information and method thereof
08/24/2000DE10003465A1 Multi port semiconductor memory device, e.g. dual port SRAM, has a memory cell array, input and output circuits operating in single clock cycle
08/23/2000EP1030362A2 Method of forming trench capacitor DRAM cell
08/23/2000EP1030312A2 Ferroelectric memory
08/23/2000EP0642685B1 Improved solid state storage device
08/23/2000CN1264170A Dyamic RAM
08/23/2000CN1264128A Dynamic access memory capable of selecting memory module self-refresh operation
08/22/2000US6108745 Fast and compact address bit routing scheme that supports various DRAM bank sizes and multiple interleaving schemes
08/22/2000US6108725 Multi-port internally cached DRAM system utilizing independent serial interfaces and buffers arbitratively connected under a dynamic configuration to allow access to a common internal bus
08/22/2000US6108395 Register device
08/22/2000US6108342 Management information base (MIB) accumulation processor
08/22/2000US6108266 Memory utilizing a programmable delay to control address buffers
08/22/2000US6108265 Semiconductor memory
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