Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
01/2001
01/09/2001US6172902 Non-volatile magnetic random access memory
01/09/2001US6172901 Low power static random access memory and method for writing to same
01/09/2001US6172900 Compact, low voltage, noise-immune RAM cell
01/09/2001US6172899 Static-random-access-memory cell
01/09/2001US6172897 Semiconductor memory and write and read methods of the same
01/09/2001US6172893 DRAM with intermediate storage cache and separate read and write I/O
01/09/2001US6172687 Memory device and video image processing apparatus using the same
01/09/2001US6172539 Synchronous buffer circuit and data transmission circuit having the synchronous buffer circuit
01/09/2001US6172537 Semiconductor device
01/09/2001US6172532 Gate circuit and semiconductor circuit to process low amplitude signals, memory, processor and information processing system manufactured by use of them
01/09/2001US6172517 Signal transmitting device, circuit block and integrated circuit suited to fast signal transmission
01/09/2001US6171875 Method of manufacture of a radial back-curling thermoelastic ink jet printer
01/04/2001WO2001001450A2 Dram cell fabrication process and method for operating same
01/04/2001WO2001001420A1 Nonvolatile memory circuit
01/04/2001WO2001001419A1 An mram cell requiring low switching field
01/04/2001DE19924568A1 Ladungspumpe Charge pump
01/04/2001DE10031575A1 Semiconductor memory element uses global databus lines for data transfer between memory block and input/output interface, data strobe lines and comparison reference voltage lines
01/04/2001DE10026782A1 Counter circuit for receiving clock signal divides clock signal to produce several division signals, generates counter signal if one division signals matches stored division value in register
01/03/2001EP1040485A4 Static memory cell with load circuit using a tunnel diode
01/03/2001EP0906623B1 Multi-level memory circuit with regulated writing voltage
01/03/2001CN1278659A Structure for pre-taking data and timing signals in integrated circuit and method thereof
01/03/2001CN1278646A Synchrnous semi-conductor storage
01/02/2001US6170036 Semiconductor memory device and data transfer circuit for transferring data between a DRAM and a SRAM
01/02/2001US6169742 Multiport data network switch having direct media access control link to external management
01/02/2001US6169704 Apparatus and method for generating a clock within a semiconductor device and devices and systems including same
01/02/2001US6169701 Semiconductor memory device using shared sense amplifier system
01/02/2001US6169699 Semiconductor memory device
01/02/2001US6169698 Voltage generating circuit for semiconductor memory sense amplifier
01/02/2001US6169697 Memory device with sensing current-reducible memory cell array
01/02/2001US6169696 Method and apparatus for stress testing a semiconductor memory
01/02/2001US6169694 Circuit and method for fully on-chip wafer level burn-in test
01/02/2001US6169691 Method for maintaining the memory content of non-volatile memory cells
01/02/2001US6169689 MTJ stacked cell memory sensing method and apparatus
01/02/2001US6169688 Magnetic storage device using unipole currents for selecting memory cells
01/02/2001US6169687 High density and speed magneto-electronic memory for use in computing system
01/02/2001US6169686 Solid-state memory with magnetic storage cells
01/02/2001US6169684 Semiconductor memory device
01/02/2001US6169423 Method and circuit for regulating the length of an ATD pulse signal
01/02/2001US6168860 Magnetic structure with stratified layers
12/2000
12/28/2000WO2000079596A1 Cmos device with diodes connected between input node and gate electrodes
12/28/2000WO2000079540A1 Magnetic memory coincident thermal pulse data storage
12/28/2000WO2000079539A1 Method of programming phase-change memory element
12/28/2000WO2000079298A2 Magnetic systems with irreversible characteristics and a method of manufacturing and repairing and operating such systems
12/28/2000DE19929174A1 Integrated circuit for synchronous graphic RAM
12/27/2000EP1062667A2 Method to write/read mram arrays
12/26/2000US6167559 FPGA structure having main, column and sector clock lines
12/26/2000US6167544 Method and apparatus for testing dynamic random access memory
12/26/2000US6167528 Programmably timed storage element for integrated circuit input/output
12/26/2000US6167487 Multi-port RAM having functionally identical ports
12/26/2000US6167486 Parallel access virtual channel memory system with cacheable channels
12/26/2000US6167484 Method and apparatus for leveraging history bits to optimize memory refresh performance
12/26/2000US6167054 Method and apparatus providing programmable thresholds for full-duplex flow control in a network switch
12/26/2000US6166993 Synchronous semiconductor memory device
12/26/2000US6166990 Clock reproduction circuit that can reproduce internal clock signal correctly in synchronization with external clock signal
12/26/2000US6166989 Clock synchronous type semiconductor memory device that can switch word configuration
12/26/2000US6166988 Semiconductor memory device using one common address bus line between address buffers and column predecoder
12/26/2000US6166985 Integrated circuit low leakage power circuitry for use with an advanced CMOS process
12/26/2000US6166981 Method for addressing electrical fuses
12/26/2000US6166980 Refresh controller in semiconductor memory
12/26/2000US6166979 Nonvolatile semiconductor memory device and method for using the same
12/26/2000US6166978 Semiconductor differential amplifier having a gain controlled by a memory transistor
12/26/2000US6166977 Address controlled sense amplifier overdrive timing for semiconductor memory device
12/26/2000US6166975 Dynamic random access memory
12/26/2000US6166973 Memory device with multiple-bit data pre-fetch function
12/26/2000US6166972 Semiconductor memory device and defect repair method for semiconductor memory device
12/26/2000US6166971 Method of and apparatus for correctly transmitting signals at high speed without waveform distortion
12/26/2000US6166970 Priority determining apparatus using the least significant bit and CAS latency signal in DDR SDRAM device
12/26/2000US6166969 Method and apparatus for a level shifter for use in a semiconductor memory device
12/26/2000US6166965 Semiconductor memory device having push-pull type output circuit formed by two N-channel MOS transistors
12/26/2000US6166964 Semiconductor memory and method of controlling data therefrom
12/26/2000US6166951 Multi state sensing of NAND memory cells by applying reverse-bias voltage
12/26/2000US6166950 Nonvolatile semiconductor storage device
12/26/2000US6166949 Nonvolatile memory device and refreshing method
12/26/2000US6166948 Magnetic memory array with magnetic tunnel junction memory cells having flux-closed free layers
12/26/2000US6166946 System and method for writing to and reading from a memory cell
12/26/2000US6166945 Method for controlling memory cell having long refresh interval
12/26/2000US6166944 Data storing apparatus including integrated magnetic memory cells and semiconductor devices
12/26/2000US6166942 Embedded DRAM architecture with local data drivers and programmable number of data read and data write lines
12/26/2000US6166940 Semiconductor memory device having a plurality of storage regions
12/26/2000US6166588 Power supply circuit
12/26/2000US6166576 Method and apparatus for controlling timing of digital components
12/26/2000US6166447 Semiconductor memory device having first and second voltage level shifters
12/26/2000US6166410 MONOS flash memory for multi-level logic and method thereof
12/26/2000US6166406 Precharge circuit and semiconductor storage device
12/26/2000US6165803 Magnetic random access memory and fabricating method thereof
12/21/2000WO2000077855A1 Ferroelectric field effect transistor, memory utilizing same, and method of operating same
12/21/2000WO2000077832A2 Metal oxide thin films for high dielectric constant applications
12/21/2000WO2000077776A1 Ultrafast magnetization reversal
12/21/2000DE19925881A1 Integrated memory arrangement for DRAM
12/21/2000DE10021346A1 Semiconducting component has HF distortion correction device that recovers lost HF components of input data depending on restoration clock signals, outputs recovered input data
12/21/2000DE10001940A1 Direct access memory component has first and second switches for coupling plate line ends to word lines and reference voltage respectively depending on first, second switch control signals
12/21/2000CA2376223A1 Ultrafast magnetization reversal
12/20/2000EP1061592A2 Magneto-resistance effect element, and its use as memory element
12/20/2000EP1061527A1 On chip programmable data pattern generator for semiconductor memories
12/20/2000EP1061526A1 On chip data comparator with variable data and compare result compression
12/20/2000EP1061525A1 Row decoder for a nonvolatile memory with possibility of selectively biasing word lines to positive or negative voltages
12/20/2000EP1061523A1 Semiconductor memory device and electronic apparatus
12/20/2000EP1060027A2 Circuit and method for specifying performance parameters in integrated circuits
12/20/2000CN1277724A A read-only memory and read-only memory device
12/20/2000CN1277723A A read-only memory and read-only memory devices