| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 03/06/2001 | US6198651 Ferroelectric memory devices which utilize boosted plate line voltages to improve reading reliability and methods of operating same |
| 03/06/2001 | US6198650 Semiconductor memory device and data output buffer thereof |
| 03/06/2001 | US6198649 Semiconductor memory device |
| 03/06/2001 | US6198341 Substrate bias voltage generating circuit for use in a semiconductor device |
| 03/06/2001 | US6198331 Voltage level converter circuit improved in operation reliability |
| 03/06/2001 | US6198326 Delay time compensation circuit for clock buffer |
| 03/06/2001 | US6198324 Flip flops |
| 03/06/2001 | US6198319 Power-on circuit built in IC |
| 03/06/2001 | US6198138 Analogue misfet with threshold voltage adjuster |
| 03/06/2001 | US6197643 Method for making level converting circuit, internal potential generating circuit and internal potential generating unit |
| 03/06/2001 | US6196739 Paper guide system in a print on demand digital camera system |
| 03/06/2001 | US6196541 De-curling print media in a digital instant printing camera |
| 03/01/2001 | DE10037950A1 Non-volatile ferroelectric memory device arrangement, includes pairs of a control-line and a read-line formed in the direction intersecting the word-lines at fixed intervals |
| 03/01/2001 | DE10037706A1 Circuit for operating non-volatile ferroelectric memory has two local word line driver units with local X-decoder unit |
| 03/01/2001 | DE10035690A1 Semiconductor memory device has input/output mode set by shifting levels of signals received at contacts of mode setting circuit |
| 03/01/2001 | DE10029887A1 Synchrone Halbleiterspeichervorrichtung The synchronous semiconductor memory device |
| 02/28/2001 | EP1079394A1 Semiconductor memory |
| 02/28/2001 | EP1078372A1 High-efficiency miniature magnetic integrated circuit structures |
| 02/28/2001 | EP1078371A1 Circuit with a sensor and non-volatile memory |
| 02/27/2001 | USRE37072 Method of multi-level storage in DRAM and apparatus thereof |
| 02/27/2001 | US6195771 Semiconductor device having semiconductor memory circuit to be tested, method of testing semiconductor memory circuit and read circuit for semiconductor memory circuit |
| 02/27/2001 | US6195306 Semiconductor device |
| 02/27/2001 | US6195305 Semiconductor integrated circuit device |
| 02/27/2001 | US6195304 Semiconductor memory device and its refresh address signal generating method adapted to reduce power consumption during refresh operation |
| 02/27/2001 | US6195303 Clock-based transparent refresh mechanisms for DRAMS |
| 02/27/2001 | US6195302 Dual slope sense clock generator |
| 02/27/2001 | US6195300 CBR refresh control for the redundancy array |
| 02/27/2001 | US6195299 Semiconductor memory device having an address exchanging circuit |
| 02/27/2001 | US6195298 Semiconductor integrated circuit capable of rapidly rewriting data into memory cells |
| 02/27/2001 | US6195296 Semiconductor memory device and system |
| 02/27/2001 | US6195289 Device for reading analog nonvolatile memory cells, in particular flash cells |
| 02/27/2001 | US6195287 Data programming method for a nonvolatile semiconductor storage |
| 02/27/2001 | US6195284 Semiconductor memory device |
| 02/27/2001 | US6195282 Wide database architecture |
| 02/27/2001 | US6195281 Apparatus for generating reference voltage in ferroelectric memory device |
| 02/27/2001 | US6195150 Pseudo-3D stereoscopic images and output device |
| 02/27/2001 | US6194953 Circuit configuration for generating an internal supply voltage |
| 02/27/2001 | US6194948 Method and an auxiliary circuit for preventing the triggering of a parasitic transistor in an output stage of an electronic circuit |
| 02/27/2001 | US6194937 Synchronous delay circuit system |
| 02/27/2001 | US6194933 Input circuit for decreased phase lag |
| 02/27/2001 | US6194931 Circuit for generating backbias voltage corresponding to frequency and method thereof for use in semiconductor memory device |
| 02/27/2001 | US6194930 DLL circuit |
| 02/27/2001 | US6194919 Main amplifier |
| 02/27/2001 | US6194916 Phase comparator circuit for high speed signals in delay locked loop circuit |
| 02/27/2001 | US6194887 Internal voltage generator |
| 02/27/2001 | US6194759 Semiconductor memory device |
| 02/27/2001 | US6194737 Phase-locked circuit device using a single-electron tunneling junction element and method of fabricating the same |
| 02/27/2001 | US6194303 Memory device |
| 02/22/2001 | WO2001013378A1 Multiple-bit nonvolatile memory using non-conductive charge trap gate |
| 02/22/2001 | DE10032311A1 Non-volatile ferroelectric memory comprises partial word lines, bit lines that cut the partial word lines, source/drain impurity regions formed on both sides of the word lines, and ferroelectric capacitors |
| 02/22/2001 | DE10009682A1 Row address circuit for semiconductor memory generates enable signal having rising edge delayed relative to that of refresh count signal |
| 02/21/2001 | CN1284724A Programmable data mode generator for use in chip of semiconductor memory |
| 02/20/2001 | US6192447 Method and apparatus for resetting a random access memory |
| 02/20/2001 | US6192429 Memory device having a controller capable of disabling data input/output mask (DQM) input buffer during portions of a read operation and a write operation |
| 02/20/2001 | US6192028 Method and apparatus providing programmable thresholds for half-duplex flow control in a network switch |
| 02/20/2001 | US6192005 Clock control signal and output enable signal generator in semiconductor memory device |
| 02/20/2001 | US6192004 Semiconductor integrated circuit |
| 02/20/2001 | US6192003 Semiconductor memory device using a relatively low-speed clock frequency and capable of latching a row address and a column address with one clock signal and performing a page operation |
| 02/20/2001 | US6192001 Integrated weak write test mode (WWWTM) |
| 02/20/2001 | US6192000 Semiconductor memory device having decreased layout area and method of manufacturing the same |
| 02/20/2001 | US6191998 Programmable logic device memory array circuit having combinable single-port memory arrays |
| 02/20/2001 | US6191996 Semiconductor memory device and data transmission method |
| 02/20/2001 | US6191994 Semiconductor device |
| 02/20/2001 | US6191989 Current sensing amplifier |
| 02/20/2001 | US6191988 Floating bitline timer allowing a shared equalizer DRAM sense amplifier |
| 02/20/2001 | US6191987 Semiconductor memory test circuit |
| 02/20/2001 | US6191986 Memory device with redundancy arrays |
| 02/20/2001 | US6191982 Address comparing for non-precharged redundancy address matching with redundancy disable mode |
| 02/20/2001 | US6191977 Sense circuit for a multi-level flash memory cell |
| 02/20/2001 | US6191973 Mram cam |
| 02/20/2001 | US6191972 Magnetic random access memory circuit |
| 02/20/2001 | US6191971 Ferroelectric memory device |
| 02/20/2001 | US6191883 Five transistor SRAM cell for small micromirror elements |
| 02/20/2001 | US6191768 Matrix display apparatus, matrix display control apparatus, and matrix display drive apparatus |
| 02/20/2001 | US6191441 Ferroelectric memory device and its drive method |
| 02/15/2001 | WO2001011629A1 Multiple data rate memory |
| 02/15/2001 | WO2000058970A3 Magnetic device and method of forming same |
| 02/15/2001 | DE19931124C1 Speicherzellenanordnung mit einem ferroelektrischen Transistor Memory cell arrangement with a ferroelectric transistor |
| 02/15/2001 | DE10034196A1 Reference voltage regulator for an integrated circuit and method for supplying a reference voltage includes an output driver to change current amplification in reaction to selective activation of multiple door release signals. |
| 02/15/2001 | DE10024297A1 Semiconducting memory device has replacement word lines with minimum distance between replacement word lines greater than minimum distance between normal word lines |
| 02/14/2001 | EP1076310A1 Computing circuit, computing apparatus, and semiconductor computing circuit |
| 02/14/2001 | EP0486295B1 Semiconductor memory device with redundant circuit |
| 02/14/2001 | CN1283871A 半导体器件和存储器模块 Semiconductor devices and memory modules |
| 02/14/2001 | CN1283853A Semiconductor memory for reducing current loss when keeping data mode |
| 02/13/2001 | US6189119 Semiconductor memory device having test mode |
| 02/13/2001 | US6188642 Integrated memory having column decoder for addressing corresponding bit line |
| 02/13/2001 | US6188641 Synchronous semiconductor memory device having input circuit with reduced power consumption |
| 02/13/2001 | US6188640 Data output circuits for semiconductor memory devices |
| 02/13/2001 | US6188639 Synchronous semiconductor memory |
| 02/13/2001 | US6188637 Semiconductor memory device allowing reduction in power consumption during standby |
| 02/13/2001 | US6188631 Semiconductor memory device column select circuit and method for minimizing load to data input/output lines |
| 02/13/2001 | US6188630 Semiconductor memory device |
| 02/13/2001 | US6188628 Semiconductor storage device |
| 02/13/2001 | US6188627 Method and system for improving DRAM subsystem performance using burst refresh control |
| 02/13/2001 | US6188626 Method of refreshing dynamic random access memory |
| 02/13/2001 | US6188625 Semiconductor memory |
| 02/13/2001 | US6188624 Low latency memory sensing circuits |
| 02/13/2001 | US6188616 Semiconductor memory device having a compensating write pulse width in response to power supply voltage |
| 02/13/2001 | US6188615 MRAM device including digital sense amplifiers |
| 02/13/2001 | US6188611 Non-volatile semiconductor memory device |