| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 02/13/2001 | US6188607 Integrated circuit memory having divided-well architecture |
| 02/13/2001 | US6188606 Multi state sensing of NAND memory cells by varying source bias |
| 02/13/2001 | US6188601 Ferroelectric memory device having single bit line coupled to at least one memory cell |
| 02/13/2001 | US6188600 Memory structure in ferroelectric nonvolatile memory and readout method therefor |
| 02/13/2001 | US6188599 Circuit for driving nonvolatile ferroelectric memory |
| 02/13/2001 | US6188597 Semiconductor memory having sub-select lines cross-connected to sub-decoders |
| 02/13/2001 | US6188415 Ink jet printer having a thermal actuator comprising an external coil spring |
| 02/13/2001 | US6188237 Impedance matching circuit, high speed semiconductor integrated circuit employing the same and computer system employing the integrated circuit |
| 02/13/2001 | US6188102 Non-volatile semiconductor memory device having multiple different sized floating gates |
| 02/13/2001 | US6187636 Flash memory device and fabrication method thereof |
| 02/13/2001 | US6187618 Vertical bipolar SRAM cell, array and system, and a method for making the cell and the array |
| 02/08/2001 | WO2001010026A1 Enhanced single event upset immune latch circuit |
| 02/08/2001 | WO2001009900A2 High speed latch and flip-flop |
| 02/08/2001 | WO2001009898A1 Method and apparatus for reading a magnetoresistive memory |
| 02/08/2001 | DE10035137A1 Semiconducting memory has control signal generation circuit, set/reset circuit, column address decoder circuit, memory cell field, delay circuit that can alter/vary reset signal delay time |
| 02/08/2001 | DE10035108A1 Non-volatile ferroelectric memory has cell arrays in matrix with number of pulldown read amplifiers formed between cell arrays and pullup read amplifier |
| 02/08/2001 | DE10034290A1 Reference level generator for application in non-volatile ferroelectric memory, includes operational control circuit for controlling the operation of reference bit-line level and feedback reference levels amplifiers |
| 02/08/2001 | DE10022770A1 Integrated circuit current read-amplifier design, has output voltage level control circuit provided with first and second resistors and NMOS transistor connected to their point |
| 02/07/2001 | EP1074995A1 Method for programming multi-level non-volatile memories by controlling the gate voltage |
| 02/07/2001 | EP1074994A1 Semiconductor storage device |
| 02/07/2001 | EP1074993A1 Semiconductor memory device with reduced current consumption in data hold mode |
| 02/07/2001 | EP1074992A1 Magnetic random access memory device |
| 02/07/2001 | CN1283308A Semiconductor integrated circuit |
| 02/07/2001 | CN1282963A Magnetic storage structure possessing improved half selection plentiful quantity |
| 02/06/2001 | US6185712 Chip performance optimization with self programmed built in self test |
| 02/06/2001 | US6185704 System signaling schemes for processor and memory module |
| 02/06/2001 | US6185656 Synchronous SRAM having pipelined enable and burst address generation |
| 02/06/2001 | US6185644 Memory system including a plurality of memory devices and a transceiver device |
| 02/06/2001 | US6185630 Device initializing system with programmable array logic configured to cause non-volatile memory to output address and data information to the device in a prescribed sequence |
| 02/06/2001 | US6185256 Signal transmission system using PRD method, receiver circuit for use in the signal transmission system, and semiconductor memory device to which the signal transmission system is applied |
| 02/06/2001 | US6185151 Synchronous memory device with programmable write cycle and data write method using the same |
| 02/06/2001 | US6185150 Clock-synchronous system |
| 02/06/2001 | US6185146 Semiconductor memory device and method for producing the same |
| 02/06/2001 | US6185144 Semiconductor memory device with reduced power consumption and stable operation in data holding state |
| 02/06/2001 | US6185143 Magnetic random access memory (MRAM) device including differential sense amplifiers |
| 02/06/2001 | US6185142 Apparatus for a semiconductor memory with independent reference voltage |
| 02/06/2001 | US6185141 Semiconductor device allowing efficient evaluation of fast operation |
| 02/06/2001 | US6185138 Method and apparatus for testing random access memory devices |
| 02/06/2001 | US6185137 Semiconductor memory device with decreased current consumption |
| 02/06/2001 | US6185134 Flash memory control method, flash memory system using the control method and flash memory device using the control method |
| 02/06/2001 | US6185132 Sensing current reduction device for semiconductor memory device and method therefor |
| 02/06/2001 | US6185125 Circuit for measuring the data retention time of a dynamic random-access memory cell |
| 02/06/2001 | US6185123 Memory cell configuration for a 1T/1C ferroelectric memory |
| 02/06/2001 | US6185122 Vertically stacked field programmable nonvolatile memory and method of fabrication |
| 02/06/2001 | US6185119 Analog memory IC with fully differential signal path |
| 02/06/2001 | US6184744 Internal power supply voltage generation circuit that can suppress reduction in internal power supply voltage in neighborhood of lower limit region of external power supply voltage |
| 02/06/2001 | US6184738 Input buffer for supplying semiconductor device with internal signal based on comparison of external signal with reference potential |
| 02/06/2001 | US6184737 Signal transmission with reduced ringing of signals |
| 02/06/2001 | US6184726 Adjustable level shifter circuits for analog or multilevel memories |
| 02/06/2001 | US6184722 Latch-type sense amplifier for amplifying low level differential input signals |
| 02/06/2001 | US6184539 Static memory cell and method of forming static memory cell |
| 02/06/2001 | US6183890 Magneto-resistance effect device and method of manufacturing the same |
| 02/06/2001 | US6183859 Low resistance MTJ |
| 02/01/2001 | WO2001008176A1 Method of manufacturing a magnetic tunnel junction device |
| 02/01/2001 | WO2001008161A2 A method and a device for testing a memory array in which fault response is compresed |
| 02/01/2001 | WO2001008159A2 Method of forming memory capacitor contact openings |
| 02/01/2001 | WO2001007926A1 Method of manufacturing a magnetic tunnel junction device |
| 02/01/2001 | DE19654928C2 Bistable trigger circuit formed by series connection of two semiconductor memories |
| 02/01/2001 | DE10022665A1 Semiconductor device has current drive circuit which passes current between power-supply node and internal voltage line, based on charging voltage of capacitor |
| 01/31/2001 | EP1073062A1 Magnetic random access memory device |
| 01/31/2001 | EP1073061A1 Magnetic memory |
| 01/31/2001 | EP1072040A1 Non-volatile storage latch |
| 01/31/2001 | EP1023732A4 A ferroelectric dynamic random access memory |
| 01/31/2001 | CN1282147A Clock signal control circuit and method and synchronous delay circuit |
| 01/30/2001 | US6182239 Fault-tolerant codes for multi-level memories |
| 01/30/2001 | US6182234 Clock control circuit |
| 01/30/2001 | US6182184 Method of operating a memory device having a variable data input length |
| 01/30/2001 | US6181702 Method and apparatus for capturing source and destination traffic |
| 01/30/2001 | US6181641 Memory device having reduced power requirements and associated methods |
| 01/30/2001 | US6181640 Control circuit for semiconductor memory device |
| 01/30/2001 | US6181637 Memory device |
| 01/30/2001 | US6181636 Output line arrangement structure of row decoding array |
| 01/30/2001 | US6181635 Reduced delay address decoders and decoding methods for integrated circuit memory devices |
| 01/30/2001 | US6181634 Multiple-port semiconductor memory device |
| 01/30/2001 | US6181633 Semiconductor device |
| 01/30/2001 | US6181632 Multiple memory bank device and method for image processing |
| 01/30/2001 | US6181631 Semiconductor memory device with a reduce access time by devising a layout of a circuit without elaborate modification |
| 01/30/2001 | US6181628 Power-on-reset circuit with analog delay and high noise immunity |
| 01/30/2001 | US6181627 Antifuse detection circuit |
| 01/30/2001 | US6181624 Integrated circuit memory having a sense amplifier activated based on word line potentials |
| 01/30/2001 | US6181622 Semiconductor memory |
| 01/30/2001 | US6181621 Threshold voltage mismatch compensated sense amplifier for SRAM memory arrays |
| 01/30/2001 | US6181620 Semiconductor storage device |
| 01/30/2001 | US6181619 Selective automatic precharge of dynamic random access memory banks |
| 01/30/2001 | US6181618 Dynamic type RAM |
| 01/30/2001 | US6181613 Semiconductor memory device operable in burst mode and normal mode through improved switching operations |
| 01/30/2001 | US6181612 Semiconductor memory capable of burst operation |
| 01/30/2001 | US6181610 Semiconductor device having current auxiliary circuit for output circuit |
| 01/30/2001 | US6181609 Semiconductor memory device having circuit for controlling data-output timing |
| 01/30/2001 | US6181608 Dual Vt SRAM cell with bitline leakage control |
| 01/30/2001 | US6181604 Method for fast programming of EPROMS and multi-level flash EPROMS |
| 01/30/2001 | US6181603 Nonvolatile semiconductor memory device having plural memory cells which store multi-value information |
| 01/30/2001 | US6181597 EEPROM array using 2-bit non-volatile memory cells with serial read operations |
| 01/30/2001 | US6181596 Method and apparatus for a RAM circuit having N-Nary output interface |
| 01/30/2001 | US6181594 Reduced leakage DRAM storage unit |
| 01/30/2001 | US6181184 Variable delay circuit and semiconductor intergrated circuit device |
| 01/30/2001 | US6181182 Circuit and method for a high gain, low input capacitance clock buffer |
| 01/30/2001 | US6181178 Systems and methods for correcting duty cycle deviations in clock and data signals |
| 01/30/2001 | US6181174 Semiconductor integrated circuit device |
| 01/30/2001 | US6181119 Circuit compensating for change in internal power supply voltage, and semiconductor integrated circuit device including such a circuit |