| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 08/08/2000 | US6101136 Signal delay device for use in semiconductor storage device for improved burst mode operation |
| 08/08/2000 | US6101135 Semiconductor memory device and data processing methods thereof |
| 08/08/2000 | US6101125 Electrically programmable memory and method of programming |
| 08/08/2000 | US6101122 Data latch circuit |
| 08/08/2000 | US6101121 Multi-level memory circuit with regulated reading voltage |
| 08/08/2000 | US6101119 Apparatus for driving cell plate line of memory device using two power supply voltage sources |
| 08/08/2000 | US6101117 Two transistor single capacitor ferroelectric memory |
| 08/08/2000 | US6100768 Ring oscillator generating pulse signal at constant pulse period under unstable power voltage |
| 08/08/2000 | US6100748 Redundant circuit for semiconductor device having a controllable high voltage generator |
| 08/08/2000 | US6100744 Integrated circuit devices having improved internal voltage generators which reduce timing skew in buffer circuits therein |
| 08/08/2000 | US6100733 Clock latency compensation circuit for DDR timing |
| 08/08/2000 | US6100563 Semiconductor device formed on SOI substrate |
| 08/08/2000 | US6100128 Process for making six-transistor SRAM cell local interconnect structure |
| 08/08/2000 | US6099100 CMOS digital level shift circuit |
| 08/03/2000 | WO2000045392A1 Integrated memory and corresponding operating method |
| 08/03/2000 | WO1999010792A3 Integrated dram with high speed interleaving |
| 08/03/2000 | DE19963684A1 Verzögerungs-Verriegelungsschleifen-Taktgenerator, welcher Verzögerungs-Impuls-Verzögerungsumwandlung einsetzt Delay-locked loop clock generator which delay pulse delay conversion uses |
| 08/03/2000 | DE19927878A1 Semiconducting memory element with address decoder has internal signal generator that activates internal main signal and trigger signal in response to activation of external main signal |
| 08/03/2000 | DE10003454A1 Verzögerungsregelkreisschaltung und diese verwendendes Verzögerungssynchronisationsverfahren Delay locked loop circuit and this delay-use synchronization method |
| 08/02/2000 | EP1024527A2 Method for obtaining a multi-value ROM in an EEPROM process flow |
| 08/02/2000 | EP1024499A2 Semiconductor memory device and method of operation |
| 08/02/2000 | EP1024498A2 Semiconductor memory device and method of operation |
| 08/02/2000 | EP1024497A2 Semiconductor memory device and method of operation |
| 08/02/2000 | EP1024431A2 Antifuse circuitry for post-package dram repair |
| 08/02/2000 | EP1023732A1 A ferroelectric dynamic random access memory |
| 08/02/2000 | EP1023731A1 Sense amplifier for flash memories |
| 08/02/2000 | EP0572027B1 Semiconductor memory device with spare columns |
| 08/01/2000 | US6098159 Information processing apparatus |
| 08/01/2000 | US6098145 Pulsed Y-decoders for improving bitline precharging in memories |
| 08/01/2000 | US6097665 Dynamic semiconductor memory device having excellent charge retention characteristics |
| 08/01/2000 | US6097662 Dynamic semiconductor memory device with low power consumption mode increasing electrostatic capacity of memory cell than in normal operation mode |
| 08/01/2000 | US6097660 Semiconductor memory device |
| 08/01/2000 | US6097659 Power-up circuit for semiconductor memory device |
| 08/01/2000 | US6097658 DRAM with reduced electric power consumption |
| 08/01/2000 | US6097657 Method for reading out the contents of a serial memory |
| 08/01/2000 | US6097654 Semiconductor memory |
| 08/01/2000 | US6097653 Circuit and method for selectively overdriving a sense amplifier |
| 08/01/2000 | US6097652 Integrated circuit memory devices including circuits and methods for discharging isolation control lines into a reference voltage |
| 08/01/2000 | US6097651 Precharge circuitry in RAM circuit |
| 08/01/2000 | US6097650 Circuit apparatus for evaluating the data content of memory cells |
| 08/01/2000 | US6097649 Method and structure for refresh operation with a low voltage of logic high in a memory device |
| 08/01/2000 | US6097648 Semiconductor memory device having plurality of equalizer control line drivers |
| 08/01/2000 | US6097642 Bus-line midpoint holding circuit for high speed memory read operation |
| 08/01/2000 | US6097639 System and method for programming nonvolatile memory |
| 08/01/2000 | US6097637 Dynamic single bit per cell to multiple bit per cell memory |
| 08/01/2000 | US6097635 Sensing circuit for programming/reading multilevel flash memory |
| 08/01/2000 | US6097634 Latch-type sensing circuit and program-verify circuit |
| 08/01/2000 | US6097629 Non-volatile, static random access memory with high speed store capability |
| 08/01/2000 | US6097628 Multi-level memory circuit with regulated writing voltage |
| 08/01/2000 | US6097627 Quantum random address memory with nano-diode mixer |
| 08/01/2000 | US6097626 MRAM device using magnetic field bias to suppress inadvertent switching of half-selected memory cells |
| 08/01/2000 | US6097625 Magnetic random access memory (MRAM) array with magnetic tunnel junction (MTJ) cells and remote diodes |
| 08/01/2000 | US6097624 Methods of operating ferroelectric memory devices having reconfigurable bit lines |
| 08/01/2000 | US6097623 Ferroelectric memory device having two columns of memory cells precharged to separate voltages |
| 08/01/2000 | US6097622 Ferroelectric memory used for the RFID system, method for driving the same, semiconductor chip and ID card |
| 08/01/2000 | US6097621 Memory cell array architecture for random access memory device |
| 08/01/2000 | US6097620 Multi-value dynamic semiconductor memory device having twisted bit line pairs |
| 08/01/2000 | US6097404 Data processing system and image processing system |
| 08/01/2000 | US6097208 Signal-transfer system and semiconductor device for high-speed data transfer |
| 08/01/2000 | US6097180 Voltage supply circuit and semiconductor device including such circuit |
| 08/01/2000 | US6097113 MOS integrated circuit device operating with low power consumption |
| 08/01/2000 | US6097059 Transistor, transistor array, method for manufacturing transistor array, and nonvolatile semiconductor memory |
| 08/01/2000 | CA2012668C Four transistor static ram cell |
| 07/27/2000 | WO2000043895A1 Dram refresh monitoring and cycle accurate distributed bus arbitration in a multi-processing environment |
| 07/27/2000 | WO2000043893A2 Method and apparatus for refreshing a semiconductor memory using idle memory cycles |
| 07/27/2000 | DE19952667A1 Non-volatile ferroelectric memory has main cell array with sub-cell arrays with global main, reference bit lines, local main, reference bit lines, switches, controllers, part word line driver |
| 07/26/2000 | EP1022859A1 Efficient memory addressing for convolutional interleaving |
| 07/26/2000 | EP1022732A1 Information recording medium |
| 07/26/2000 | EP1022642A1 Integrated circuit I/O using a high performance bus interface |
| 07/26/2000 | EP1022641A1 Integrated circuit i/o using a high performance bus interface |
| 07/26/2000 | EP1021794A1 A camera with internal printing system |
| 07/26/2000 | EP0896735B1 Storage cell arrangement in which vertical mos transistors have at least three different threshold voltages depending on stored data, and method of producing said arrangement |
| 07/26/2000 | EP0888618A4 Second-layer phase change memory array on top of a logic device |
| 07/26/2000 | EP0846343A4 Electrically erasable memory elements characterized by reduced current and improved thermal stability |
| 07/26/2000 | CN1054940C Data output buffer of a synchronousemiconductor memory device |
| 07/25/2000 | US6094736 Semiconductor integrated circuit device |
| 07/25/2000 | US6094727 Method and apparatus for controlling the data rate of a clocking circuit |
| 07/25/2000 | US6094705 Method and system for selective DRAM refresh to reduce power consumption |
| 07/25/2000 | US6094703 Synchronous SRAM having pipelined memory access enable for a burst of addresses |
| 07/25/2000 | US6094436 Integrated multiport switch having shared media access control circuitry |
| 07/25/2000 | US6094398 DRAM including an address space divided into individual blocks having memory cells activated by row address signals |
| 07/25/2000 | US6094396 Memory array architecture for multi-data rate operation |
| 07/25/2000 | US6094395 Arrangement for controlling voltage generators in multi-voltage generator chips such as DRAMs |
| 07/25/2000 | US6094392 Semiconductor memory device |
| 07/25/2000 | US6094391 Equilibrate circuit for dynamic plate sensing memories |
| 07/25/2000 | US6094390 Semiconductor memory device with column gate and equalizer circuitry |
| 07/25/2000 | US6094386 Semiconductor memory device of redundant circuit system |
| 07/25/2000 | US6094384 Column redundancy circuit |
| 07/25/2000 | US6094382 Integrated circuit memory devices with improved layout of fuse boxes and buses |
| 07/25/2000 | US6094381 Semiconductor memory device with redundancy circuit |
| 07/25/2000 | US6094380 Memory device with a data output buffer and the control method thereof |
| 07/25/2000 | US6094379 Memory reading circuit and SRAM |
| 07/25/2000 | US6094378 System for improved memory cell access |
| 07/25/2000 | US6094376 Data output buffer control circuit for a semiconductor memory device |
| 07/25/2000 | US6094375 Integrated circuit memory devices having multiple data rate mode capability and methods of operating same |
| 07/25/2000 | US6094374 Nonvolatile semiconductor memory device including sense amplifier having verification circuit |
| 07/25/2000 | US6094371 Memory device with ferroelectric capacitor |
| 07/25/2000 | US6094370 Semiconductor memory device and various systems mounting them |
| 07/25/2000 | US6094369 Ferroelectric nonvolatile memory element having capacitors of same dielectric constant and method thereof |
| 07/25/2000 | US6094368 Auto-tracking write and read processes for multi-bit-per-cell non-volatile memories |