Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
07/2000
07/25/2000US6094090 Differential amplifier circuit, CMOS inverter, demodulator circuit for pulse-width modulation, and sampling circuit
07/25/2000US6094083 Voltage converting buffer circuit capable of realizing high speed flip-flop action in the flip-flop circuit
07/25/2000US6094080 Internal clock signal generator for synchronous memory device
07/25/2000US6094067 Output buffer circuit
07/25/2000US6093954 Semiconductor device having variable delay circuit having multi-layered semiconductor structure
07/25/2000US6093950 Semiconductor device having various threshold voltages and manufacturing same
07/20/2000WO2000042660A1 Ferroelectric memory with ferroelectric thin film and method of fabrication
07/20/2000WO2000042615A2 Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system
07/20/2000WO2000042614A1 Read/write architecture for a mram
07/20/2000WO2000042613A1 Magnetic random access memory
07/20/2000WO2000042612A1 Integrated memory
07/20/2000DE19963417A1 Non-volatile ferroelectric memory (FRAM), containing main cell array with number of sub cell arrays and global main bit lines
07/20/2000DE19962509A1 Bit line read-out amplifier in semiconductor memory and its driving method, preventing energy consumption during read-out and preloading
07/20/2000DE19936777A1 Electronic circuit system for improved signal transmission efficiency has looped macro circuits that forward signals not designated for them, and accept signals that are designated for them
07/19/2000EP1020870A1 Method and device for multi-level programming of a memory cell
07/19/2000EP1020869A1 A sensing apparatus and method for fetching multi-level cell data
07/19/2000EP1020868A1 Semiconductor integrated circuit device
07/19/2000EP1020867A1 Method for refreshing a dynamic memory
07/19/2000EP1020866A1 A dram capable of selectively performing a self-refresh operation
07/19/2000EP1020864A1 High capacity dimm memory with data and state memory
07/19/2000EP1019913A1 Memory cell arrangement
07/19/2000EP1019911A1 Apparatus and method for device timing compensation
07/19/2000EP1019910A1 Selective power distribution circuit for an integrated circuit
07/19/2000EP1019821A4 Method and apparatus for correcting a multilevel cell memory by using interleaving
07/19/2000EP1019821A1 Method and apparatus for correcting a multilevel cell memory by using interleaving
07/18/2000US6092227 Test circuit
07/18/2000US6092165 Memory control unit using a programmable shift register for generating timed control signals
07/18/2000US6091667 Semiconductor memory device and a data reading method and a data writing method therefor
07/18/2000US6091663 Synchronous burst semiconductor memory device with parallel input/output data strobe clocks
07/18/2000US6091662 Semiconductor synchronous pipeline memory having data amplifiers selectively supplied with data signals
07/18/2000US6091661 Data access device for DRAM
07/18/2000US6091660 Semiconductor integrated circuit device
07/18/2000US6091659 Synchronous semiconductor memory device with multi-bank configuration
07/18/2000US6091656 Semiconductor integrated circuit device having a hierarchical power source configuration
07/18/2000US6091655 Semiconductor memory
07/18/2000US6091648 Voltage generating circuit for semiconductor integrated circuit device
07/18/2000US6091647 Semiconductor memory device including an SOI substrate
07/18/2000US6091642 Method for controlled erasing memory devices, in particular analog and multi-level flash-EEPROM devices
07/18/2000US6091640 Semiconductor integrated circuit with multiple write operation modes
07/18/2000US6091637 Method for writing data into non-volatile semiconductor memory cell
07/18/2000US6091631 Program/verify technique for multi-level flash cells enabling different threshold levels to be simultaneously programmed
07/18/2000US6091629 High speed semiconductor memory apparatus including circuitry to increase writing and reading speed
07/18/2000US6091626 Low voltage, low power static random access memory cell
07/18/2000US6091625 Ferroelectric memory and method for preventing aging in a memory cell
07/18/2000US6091624 SWL ferroelectric memory and circuit for driving the same
07/18/2000US6091622 Nonvolatile ferroelectric memory device
07/18/2000US6091621 Non-volatile multistate memory cell using a ferroelectric gate fet
07/18/2000US6091618 Method and circuitry for storing discrete amounts of charge in a single memory element
07/18/2000US6091290 Semiconductor integrated circuit
07/18/2000US6091101 Multi-level flash memory using triple well
07/18/2000US6091095 Semiconductor storage
07/18/2000US6090480 Magnetoresistive devices for reading out data recorded on magnetic memory media, magnetoresistive sensors, and magnetic memory systems
07/13/2000WO2000041181A2 Seu hardening circuit
07/13/2000WO2000041180A1 Vertically integrated magnetic memory
07/13/2000WO2000040986A1 Pattern generator for a packet-based memory tester
07/13/2000DE19840823C1 Magnetoresistives Element und dessen Verwendung als Speicherelement in einer Speicherzellenanordnung The magnetoresistive element and its use as memory element in a memory cell arrangement
07/13/2000CA2358200A1 Vertically integrated magnetic memory
07/12/2000EP1018745A1 Improved driver circuit
07/12/2000EP1018118A1 Mram with shared word and digit lines
07/12/2000EP0904589A4 Floating gate memory device with low current page buffer
07/12/2000CN1259743A Strength-adjustable driving circuit and adjustable method
07/12/2000CN1259742A Improved driving device circuit
07/11/2000US6088820 Static semiconductor memory device having test mode
07/11/2000US6088819 Dynamic semiconductor memory device and method of testing the same
07/11/2000US6088808 Low power consumption semiconductor integrated circuit device and microprocessor
07/11/2000US6088762 Power failure mode for a memory controller
07/11/2000US6088760 Addressing system in a multi-port RAM having main and cache memories
07/11/2000US6088292 Semiconductor memory device having a plurality of banks activated by a common timing control circuit
07/11/2000US6088291 Semiconductor memory device
07/11/2000US6088290 Semiconductor memory device having a power-down mode
07/11/2000US6088286 Word line non-boosted dynamic semiconductor memory device
07/11/2000US6088283 Semiconductor memory device capable of preventing noise from occurring in the bus lines
07/11/2000US6088280 High-speed memory arranged for operating synchronously with a microprocessor
07/11/2000US6088279 Semiconductor memory device with dummy word line
07/11/2000US6088276 Semiconductor device provided with a circuit performing fast data reading with a low power consumption
07/11/2000US6088275 Semiconductor memory device operating at a low level power supply voltage
07/11/2000US6088273 Method and circuit for measuring the read operation delay on DRAM bit lines
07/11/2000US6088270 Sense amplifier with local write drivers
07/11/2000US6088261 Semiconductor storage device
07/11/2000US6088260 Dynamic random access memory cell and method for fabricating the same
07/11/2000US6088259 SRAM cell using two single transistor inverters
07/11/2000US6088257 Ferroelectric random access memory device and method for operating the same
07/11/2000US6088255 Semiconductor device with prompt timing stabilization
07/11/2000US6088253 Semiconductor memory device and method for forming same
07/11/2000US6088252 Semiconductor storage device with an improved arrangement of electrodes and peripheral circuits to improve operational speed and integration
07/11/2000US6088195 Magnetoresistance effect element
07/11/2000US6087891 Integrated power supply voltage generators having reduced susceptibility to parasitic latch-up during set-up mode operation
07/11/2000US6087859 Current mirror type sense amplifier circuit for semiconductor memory device
07/11/2000US6087851 Method and apparatus for configuring a semiconductor device for compatibility with multiple logic interfaces
07/11/2000US6087813 Internal voltage generation circuit capable of stably generating internal voltage with low power consumption
07/06/2000DE19963497A1 Double data rate (DDR) synchronous dynamic random access assembly (SDRAM) for carrying out data read-out operations
07/05/2000EP1017100A1 Three-dimensional device
07/05/2000EP1016511A1 Molded body of thermoplastic resin having sound absorption characteristics
07/05/2000EP1016088A1 Ferroelectric memory cell with shunted ferroelectric capacitor and method of making same
07/05/2000EP1016087A1 Memory location arrangement and its use as a magnetic ram and as an associative memory
07/05/2000EP0809846B1 Nonvolatile magnetoresistive memory with fully closed-flux operation
07/05/2000CN1054228C Semiconductor memory device with reduced data bus line load
07/04/2000US6085300 DRAM system with simultaneous burst read and write
07/04/2000US6085284 Method of operating a memory device having a variable data output length and an identification register
07/04/2000US6084822 Semiconductor synchronous memory device responsive to external masking signal for forcing data port to enter into high-impedance state and method for controlling the same