| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 04/04/2001 | EP1089341A2 Non-volatile memory |
| 04/04/2001 | EP1089339A2 Ferroelectric capacitor and ferrroelectric memory |
| 04/04/2001 | EP1089288A1 Memory controller and method for optional access to SRAM or DRAM |
| 04/04/2001 | EP1089286A1 Clock suspending circuitry |
| 04/04/2001 | EP1088310A2 Radiation hardened six transistor random access memory and memory device |
| 04/04/2001 | EP1088309A1 Writing and reading method for ferroelectric memory |
| 04/04/2001 | EP0902924B1 Redundancy memory circuit with rom storage cells |
| 04/04/2001 | CN1064132C Spin valve magnetoresistive sensor with self-pinned laminated layer and magnetic recording system using the sensor |
| 04/03/2001 | US6212648 Memory module having random access memories with defective addresses |
| 04/03/2001 | US6212615 Semiconductor circuit having burst counter circuit which is reduced the circuits passing from the clock input terminal to output terminal |
| 04/03/2001 | US6212482 Circuit and method for specifying performance parameters in integrated circuits |
| 04/03/2001 | US6212127 Semiconductor device and timing control circuit |
| 04/03/2001 | US6212126 Semiconductor device including clock generation circuit capable of generating internal clock stably |
| 04/03/2001 | US6212125 Asynchronous semiconductor memory device with a control circuit that controls the latch timing of an input signal |
| 04/03/2001 | US6212124 Static RAM having word line driving circuitry shared by all the memory cells provided therein |
| 04/03/2001 | US6212121 Semiconductor memory device with multiple sub-arrays of different sizes |
| 04/03/2001 | US6212120 Semiconductor memory device with less power consumption |
| 04/03/2001 | US6212118 Semiconductor memory |
| 04/03/2001 | US6212117 Duplicate bitline self-time technique for reliable memory operation |
| 04/03/2001 | US6212116 Semiconductor memory device |
| 04/03/2001 | US6212113 Semiconductor memory device input circuit |
| 04/03/2001 | US6212110 Semiconductor memory device |
| 04/03/2001 | US6212109 Dynamic memory array having write data applied to selected bit line sense amplifiers before sensing to write associated selected memory cells |
| 04/03/2001 | US6212108 Distributed voltage charge circuits to reduce sensing time in a memory device |
| 04/03/2001 | US6212107 Charge pump circuit and a step-up circuit provided with same |
| 04/03/2001 | US6212100 Nonvolatile memory cell and method for programming and/or verifying the same |
| 04/03/2001 | US6212094 Low power SRAM memory cell having a single bit line |
| 04/03/2001 | US6212093 High-density non-volatile memory devices incorporating sandwich coordination compounds |
| 04/03/2001 | US6212092 Semiconductor integrated circuit |
| 04/03/2001 | US6212090 Semiconductor device including a repetitive pattern |
| 04/03/2001 | US6212089 Semiconductor memory device and defect remedying method thereof |
| 04/03/2001 | US6211707 Output buffer circuit with preset function |
| 04/03/2001 | US6211704 Asynchronous sensing differential logic (ASDL) circuit |
| 04/03/2001 | US6211692 Method and apparatus for determining the robustness and incident angle sensitivity of memory cells to alpha-particle/cosmic ray induced soft errors |
| 04/03/2001 | US6211531 Controllable conduction device |
| 04/03/2001 | US6211456 Method and apparatus for routing 1 of 4 signals |
| 04/03/2001 | US6211004 Semiconductor integrated circuit device and process for manufacturing the same |
| 04/03/2001 | CA2170087C High-density read-only memory |
| 03/29/2001 | WO2001022423A1 Memory devices |
| 03/29/2001 | WO2000052699A8 Magneto resistor sensor with diode short for a non-volatile random access ferromagnetic memory |
| 03/29/2001 | DE19944738A1 Segmented word line architecture |
| 03/29/2001 | DE19944248A1 Inputbuffer einer integrierten Halbleiterschaltung Input buffer of a semiconductor integrated circuit |
| 03/29/2001 | DE10043650A1 Internal clock generation circuit for SDRAM, has delay circuits to delay internal signals based on delay control time set according to phase difference between one of the internal signals and output of delay circuit |
| 03/28/2001 | EP1087405A1 Semiconductor memory device capable of generating offset voltage independent of bit line voltage |
| 03/28/2001 | EP1087403A1 Ferroelectric memory device |
| 03/28/2001 | EP1086465A1 Method and apparatus for a serial access memory |
| 03/28/2001 | EP0925548B1 Data transfer method for a radio frequency identification system |
| 03/28/2001 | CN1289126A Semiconductor apparatus |
| 03/27/2001 | US6209113 Method and apparatus for performing error correction on data read from a multistate memory |
| 03/27/2001 | US6209056 Semiconductor memory device having a plurality of bank sections distributed in a plurality of divided memory cell arrays |
| 03/27/2001 | US6208583 Synchronous semiconductor memory having an improved reading margin and an improved timing control in a test mode |
| 03/27/2001 | US6208582 Memory device including a double-rate input/output circuit |
| 03/27/2001 | US6208581 Hybrid memory device and method for controlling same |
| 03/27/2001 | US6208580 Semiconductor storage device including column pre-decoder circuit for preventing multiple selection of bit lines |
| 03/27/2001 | US6208577 Circuit and method for refreshing data stored in a memory cell |
| 03/27/2001 | US6208576 Synchronous semiconductor memory device |
| 03/27/2001 | US6208575 Dynamic memory array bit line sense amplifier enabled to drive toward, but stopped before substantially reaching, a source of voltage |
| 03/27/2001 | US6208574 Sense amplifier with local column read amplifier and local data write drivers |
| 03/27/2001 | US6208573 Semiconductor memory device |
| 03/27/2001 | US6208566 Semiconductor integrated circuit |
| 03/27/2001 | US6208563 Semiconductor memory device which continuously performs read/write operations with short access time |
| 03/27/2001 | US6208560 Nonvolatile semiconductor memory device |
| 03/27/2001 | US6208555 Negative resistance memory cell and method |
| 03/27/2001 | US6208554 Single event upset (SEU) hardened static random access memory cell |
| 03/27/2001 | US6208553 High density non-volatile memory device incorporating thiol-derivatized porphyrins |
| 03/27/2001 | US6208551 Memory circuit architecture |
| 03/27/2001 | US6208550 Ferroelectric memory device and method for operating thereof |
| 03/27/2001 | US6208547 Memory circuit/logic circuit integrated device capable of reducing term of works |
| 03/27/2001 | US6208545 Three dimensional structure memory |
| 03/27/2001 | US6208542 Techniques for storing digital data in an analog or multilevel memory |
| 03/27/2001 | US6208170 Semiconductor integrated circuit having a sleep mode with low power and small area |
| 03/27/2001 | US6208168 Output driver circuits having programmable pull-up and pull-down capability for driving variable loads |
| 03/27/2001 | US6207998 Semiconductor device with well of different conductivity types |
| 03/27/2001 | US6207507 Multi-level flash memory using triple well process and method of making |
| 03/22/2001 | WO2001020610A1 Architecture, method(s) and circuitry for low power memories |
| 03/22/2001 | WO2001020454A1 Memory redundancy techniques |
| 03/22/2001 | WO2001020356A1 Magnetoresistive sensor or memory elements with decreased magnetic switch field |
| 03/22/2001 | WO2001008161A3 A method and a device for testing a memory array in which fault response is compresed |
| 03/22/2001 | DE19944036A1 Integrierter Speicher mit wenigstens zwei Plattensegmenten Integrated memory having at least two plate segments |
| 03/22/2001 | DE10042388A1 Ferroelectric random-access memory has equalising device for equalising adjacent bit lines, pre-loading setting device for bit line pre-loading level and reference level generation device for read amplifier |
| 03/22/2001 | DE10031433A1 Memory Device with Packet Command Memory device with Packet Command |
| 03/22/2001 | DE10018988A1 Pipeline device for SDRAM, includes register which supply data to corresponding data path in response to control signal output by control signal generation circuit |
| 03/22/2001 | CA2384862A1 Architecture, method(s) and circuitry for low power memories |
| 03/21/2001 | EP1085586A2 Magnetoresistive element and magnetic memory device |
| 03/21/2001 | EP1085523A1 Integrated memory with memory cells and reference cells |
| 03/21/2001 | EP1085519A1 Semiconductor integrated device |
| 03/21/2001 | EP1085517A2 Integrated memory circuit with at least two plate segments |
| 03/21/2001 | CN1288290A Input buffer for semiconductor integrated circuit |
| 03/21/2001 | CN1288262A Method and device for replacing non-working metallic wire for dynamic random access memory |
| 03/21/2001 | CN1288237A Integrated storage unit having at least two slice frayments |
| 03/21/2001 | CN1288236A Integrated storage unit having storage cells and reference unit |
| 03/20/2001 | US6205514 Synchronous SRAM having global write enable |
| 03/20/2001 | US6205086 Phase control circuit, semiconductor device and semiconductor memory |
| 03/20/2001 | US6205085 Method and circuit for sending a signal in a semiconductor device during a setup time |
| 03/20/2001 | US6205082 LSI device with memory and logics mounted thereon |
| 03/20/2001 | US6205081 Address generating circuit of semiconductor memory device |
| 03/20/2001 | US6205080 Column decode circuits and apparatus |
| 03/20/2001 | US6205079 Semiconductor integrated circuit having power-supply circuits for producing internal supply voltages |
| 03/20/2001 | US6205076 Destructive read type memory circuit, restoring circuit for the same and sense amplifier |
| 03/20/2001 | US6205073 Current conveyor and method for readout of MTJ memories |