Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
05/2000
05/09/2000US6061759 Hidden precharge pseudo cache DRAM
05/09/2000US6061295 Integrated circuit memory devices having time compensated column selection capability for improving write operation reliability
05/09/2000US6061294 Synchronous semiconductor memory device and method of controlling sensing process of synchronous dynamic RAM
05/09/2000US6061290 Method and apparatus for simultaneous memory subarray testing
05/09/2000US6061288 Semiconductor device
05/09/2000US6061287 Semiconductor memory device
05/09/2000US6061286 Memory device with reduced power dissipation
05/09/2000US6061278 Semiconductor memory, data read method for semiconductor memory and data storage apparatus
05/09/2000US6061277 Dynamic memory word line driver scheme
05/09/2000US6061276 Semiconductor memory device and a semiconductor integrated circuit
05/09/2000US6061275 Semiconductor integrated circuit device having clamp circuit for accelerating data transfer on data bus
05/09/2000US6061271 Memory cell of nonvolatile semiconductor memory device
05/09/2000US6061268 0.7V two-port 6T SRAM memory cell structure with single-bit-line simultaneous read-and-write access (SBLSRWA) capability using partially-depleted SOI CMOS dynamic-threshold technique
05/09/2000US6061267 Memory circuits, systems, and methods with cells using back bias to control the threshold voltage of one or more corresponding cell transistors
05/09/2000US6061266 Ferroelectric random access memory device including active read/write circuit
05/09/2000US6060946 Semiconductor device having improved immunity to power supply voltage fluctuations
05/09/2000US6060942 Voltage boosting power supply circuit of memory integrated circuit and method for controlling charge amount of voltage boosting power supply
05/09/2000US6060928 Device for delaying clock signal
05/09/2000US6060924 Semiconductor integrated circuit which contains scan circuits of different types
05/09/2000US6060916 Operation controller for a semiconductor memory device
05/09/2000US6060905 Variable voltage, variable impedance CMOS off-chip driver and receiver interface and circuits
05/09/2000US6060723 Controllable conduction device
05/04/2000WO2000025318A1 Non-volatile memory with improved sensing and method therefor
05/04/2000WO2000025317A1 Method and apparatus for increasing the time available for refresh for 1-t sram compatible devices
05/04/2000DE19947976A1 Semiconductor device e.g. application specific integrated circuit chip, includes macro cell distributed to periphery functional block on semiconductor chip
05/04/2000DE19933008A1 Refreshing cycle control for semiconductor memory acting during self- or automatic refreshing operation of DRAM cell array
05/03/2000EP0997913A1 Method and circuit for testing virgin memory cells in a multilevel memory device
05/03/2000EP0997912A1 Device for reading nonvolatile memory cells, in particular analog flash memory cells
05/03/2000EP0997911A1 Voltage clamping method and apparatus for dynamic random access memory devices
05/03/2000EP0997033A1 A replenishable one time use camera system
05/03/2000EP0871956B1 Method and apparatus for a low power self-timed memory control system
05/03/2000EP0847581B1 Expandable data width sam for a multiport ram
05/03/2000EP0745257B1 A method for programming a single eprom or flash memory cell to store multiple levels of data
05/03/2000CN2376655Y System synchronous reset high-speed self-holding semiconductor memory
05/02/2000US6058495 Multi-bit test circuit in semiconductor memory device and method thereof
05/02/2000US6058452 Memory cells configurable as CAM or RAM in programmable logic devices
05/02/2000US6058451 Method and apparatus for refreshing a non-clocked memory
05/02/2000US6058427 Apparatus and method for generating a serial data stream carrying data for multiple network switch ports for use by a physical transceiver
05/02/2000US6058112 Internal rules checker diagnostic mode
05/02/2000US6058069 Protection circuit to ensure DRAM signal in write cycle
05/02/2000US6058067 Multi-bank semiconductor memory device having an output control circuit for controlling bit line pairs of each bank connected to data bus pairs
05/02/2000US6058064 Semiconductor memory devices having shared data line contacts
05/02/2000US6058063 Integrated circuit memory devices having reduced power consumption requirements during standby mode operation
05/02/2000US6058061 Semiconductor circuit device with reduced power consumption in slow operation mode.
05/02/2000US6058060 Multi-bit-per-cell and analog/multi-level non-volatile memories with improved resolution and signal-to noise ratio
05/02/2000US6058058 Memory device with a sense amplifier
05/02/2000US6058051 Memory cell of non-volatile semiconductor memory device
05/02/2000US6058050 Precharge-enable self boosting word line driver for an embedded DRAM
05/02/2000US6058049 Reference voltage generating circuit for ferroelectric memory device
05/02/2000US6058042 Semiconductor nonvolatile memory device and method of data programming the same
05/02/2000US6058041 SEU hardening circuit
05/02/2000US6058040 Ferroelectric memory
05/02/2000US6058038 Semiconductor device
05/02/2000US6057676 Regulated DRAM cell plate and precharge voltage generator
04/2000
04/30/2000CA2253128A1 Structure of random access memory formed of multibit cells
04/26/2000EP0996163A2 Memory cell array and implantation mask for making the same
04/26/2000EP0996129A1 DRAM memory cell
04/26/2000EP0996113A1 Method and apparatus for magnetic recording
04/25/2000US6055655 Semiconductor integrated circuit device and method of testing the same
04/25/2000US6055615 Pipeline memory access using DRAM with multiple independent banks
04/25/2000US6055609 Apparatus and method for improving bus usage in a system having a shared memory
04/25/2000US6055210 Synchronous type semiconductor memory device
04/25/2000US6055209 Synchronous semiconductor memory device exhibiting an operation synchronous with an externally inputted clock signal
04/25/2000US6055208 Method and circuit for sending a signal in a semiconductor device during a setup time
04/25/2000US6055207 Synchronous semiconductor memory device having a column disabling circuit
04/25/2000US6055206 Synchronous semiconductor memory device capable of reducing power dissipation by suppressing leakage current during stand-by and in active operation
04/25/2000US6055201 High voltage boosted word line supply charge pump and regulator for DRAM
04/25/2000US6055200 Variable test voltage circuits and methods for ferroelectric memory devices
04/25/2000US6055197 Semiconductor memory device with simultaneously activated elements and a redundancy scheme thereof
04/25/2000US6055196 Semiconductor device with increased replacement efficiency by redundant memory cell arrays
04/25/2000US6055195 Delay circuit and delay chain circuit for measurement of the charge/discharge period of dynamic random access memory
04/25/2000US6055194 Method and apparatus for controlling column select lines in a synchronous memory device
04/25/2000US6055193 Charge pump circuits and devices containing such
04/25/2000US6055192 Dynamic random access memory word line boost technique employing a boost-on-writes policy
04/25/2000US6055185 Single-poly EPROM cell with CMOS compatible programming voltages
04/25/2000US6055182 Semiconductor memory cell and method of manufacturing the same
04/25/2000US6055181 Nonvolatile semiconductor memory device capable of storing multi-value data of more than one bit in a memory cell
04/25/2000US6055180 Electrically addressable passive device, method for electrical addressing of the same and uses of the device and the method
04/25/2000US6055179 Memory device utilizing giant magnetoresistance effect
04/25/2000US6055178 Magnetic random access memory with a reference memory array
04/25/2000US6055176 Memory device with processing function
04/25/2000US6055175 Nonvolatile ferroelectric memory
04/25/2000US6054918 Self-timed differential comparator
04/25/2000US6054885 Semiconductor device and testing apparatus thereof
04/25/2000US6054878 Address transition detection summation circuit
04/25/2000US6054742 Structure for cross coupled thin film transistors and static random access memory cell
04/25/2000US6054730 Semiconductor device
04/25/2000US6054349 Single-electron device including therein nanocrystals
04/25/2000US6054346 DRAM cell, DRAM and method for fabricating the same
04/20/2000WO2000022626A1 Semiconductor device
04/20/2000WO2000022625A1 Self-referencing ferroelectric memory
04/20/2000WO2000022448A1 Magnetic sensor produced by constriction
04/20/2000WO2000004555A3 Storage cell system in which an electric resistance of a storage element represents an information unit and can be influenced by a magnetic field, and method for producing same
04/19/2000EP0994486A2 Semiconductor memory device
04/19/2000EP0994483A1 Apparatus and method for noise reduction in DRAM
04/19/2000EP0994420A2 Integrated circuit i/o using a high performance bus interface
04/19/2000EP0525068B1 Semiconductor memory device
04/19/2000CN1051644C 半导体器件 Semiconductor devices
04/18/2000US6052751 Method and apparatus for changing the number of access slots into a memory
04/18/2000US6052705 Video signal processor with triple port memory