Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
09/2000
09/27/2000CN1267889A Parallel redundant method and apparatus for semi-conductor storage
09/26/2000US6125432 Image process apparatus having a storage device with a plurality of banks storing pixel data, and capable of precharging one bank while writing to another bank
09/26/2000US6125425 Memory controller performing a mid transaction refresh and handling a suspend signal
09/26/2000US6125078 Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system
09/26/2000US6125077 Apparatus and method for providing a quiet time before analog signal sampling in a mixed signal integrated circuit employing synchronous and asynchronous clocking
09/26/2000US6125076 Word line control circuit
09/26/2000US6125075 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions
09/26/2000US6125074 Semiconductor memory device having a small memory cell driving circuit
09/26/2000US6125073 Integrated semiconductor memory
09/26/2000US6125071 Semiconductor memory device with high data read rate
09/26/2000US6125070 Semiconductor memory device having multiple global I/O line pairs
09/26/2000US6125065 Semiconductor memory with column gates and method of controlling column gates during a write mask operation
09/26/2000US6125064 CAS latency control circuit
09/26/2000US6125062 Single electron MOSFET memory device and method
09/26/2000US6125052 Semiconductor memory device
09/26/2000US6125051 Circuit for driving nonvolatile ferroelectric memory
09/26/2000US6124752 Semiconductor integrated circuit device controlling the threshold value thereof for power reduction at standby mode
09/26/2000US6124749 Semiconductor circuit device with reduced power consumption
09/26/2000US6124735 Method and apparatus for a N-nary logic circuit using capacitance isolation
09/20/2000EP1037213A2 Ferroelectric memory device retaining rom data
09/20/2000EP1037212A1 Semiconductor integrated circuit device
09/20/2000EP0937302A4 Spin dependent tunneling memory
09/20/2000CN1267389A Electrically addressable passive device, method for electrical addressing of same and use of said device and method
09/20/2000CN1267091A Semiconductor IC device
09/19/2000USRE36875 Semiconductor memory device capable of performing test mode operation and method of operating such semiconductor device
09/19/2000US6122710 Dynamic word line driver for cache
09/19/2000US6122702 Memory cells matrix for a semiconductor integrated microcontroller
09/19/2000US6122688 Protocol for communication with dynamic memory
09/19/2000US6122669 Method and apparatus for auto-incrementing through table and updating single register in memory
09/19/2000US6122220 Circuits and methods for generating internal signals for integrated circuits by dynamic inversion and resetting
09/19/2000US6122216 Single package dual memory device
09/19/2000US6122215 DRAM having a power supply voltage lowering circuit
09/19/2000US6122214 Semiconductor memory
09/19/2000US6122213 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array
09/19/2000US6122211 Fast, low power, write scheme for memory circuits using pulsed off isolation device
09/19/2000US6122210 Data out buffer circuit and SRAM
09/19/2000US6122207 Semiconductor memory device and method for relieving defective memory cells
09/19/2000US6122202 CASB buffer circuit of semiconductor memory device
09/19/2000US6122193 Non-volatile semiconductor memory capable of storing 1-bit data or multi-bit data
09/19/2000US6122190 Semiconductor memory device capable of high speed plural parallel test
09/19/2000US6122188 Non-volatile memory device having multi-bit cell structure and a method of programming same
09/19/2000US6121812 Delay circuit having delay time free from influence of operation environment
09/19/2000US6121646 Semiconductor integrated circuit
09/19/2000US6121079 Method for manufacturing a semiconductor memory device
09/14/2000WO2000054281A1 Method for the toroidal writing and reading of information, memory cell and memory device for realising this method
09/14/2000WO2000054159A1 Method and system for selective dram refresh to reduce power consumption
09/14/2000DE4243592C2 Paralleltestschaltung für einen Halbleiter-Speicherchip Parallel test circuitry for a semiconductor memory chip
09/13/2000EP1035652A1 Capacitive coupled driver circuit
09/13/2000EP1035549A1 Cipher machine
09/13/2000EP1035548A1 Synchronous semiconductor memory device
09/13/2000EP1035478A2 Semiconductor memory with a timing controlled for receiving data at a semiconductor memory module to be accessed
09/13/2000EP1035473A1 Method for correcting errors in a multilevel memory
09/13/2000EP0972287A4 High-efficiency miniature magnetic integrated circuit structures
09/13/2000CN1266285A Refractory fuse circuit for packaged DRAM repair
09/13/2000CN1266266A Capacitance coupled driving circuit
09/13/2000CN1266265A Latching type read amplifier circuit
09/12/2000US6118730 Phase comparator with improved comparison precision and synchronous semiconductor memory device employing the same
09/12/2000US6118729 Synchronous semiconductor memory device
09/12/2000US6118726 Shared row decoder
09/12/2000US6118723 Semiconductor memory device
09/12/2000US6118722 Integrated circuit memory device
09/12/2000US6118721 Random access memory with divided memory banks and data read/write architecture therefor
09/12/2000US6118719 Self-initiated self-refresh mode for memory modules
09/12/2000US6118718 Semiconductor memory device in which a BIT line pair having a high load is electrically separated from a sense amplifier
09/12/2000US6118717 Method and apparatus for loading directly onto bit lines in a dynamic random access memory
09/12/2000US6118716 Method and apparatus for an address triggered RAM circuit
09/12/2000US6118715 Semiconductor memory device having improved manner of data line connection in hierarchical data line structure
09/12/2000US6118714 Semiconductor memory circuit with bit lines discharging means
09/12/2000US6118712 Redundancy fuse boxes and redundancy repair structures for semiconductor devices
09/12/2000US6118710 Semiconductor memory device including disturb refresh test circuit
09/12/2000US6118708 Semiconductor memory device
09/12/2000US6118705 Page mode erase in a flash memory array
09/12/2000US6118701 Method and apparatus capable of trimming a nonvolatile semiconductor storage device without any superfluous pads or terminals
09/12/2000US6118696 Multi-bit memory cell array of a non-volatile semiconductor memory device and method for driving the same
09/12/2000US6118694 Distributing CFI devices in existing decoders
09/12/2000US6118693 Electrically erasable non-volatile memory cell with integrated SRAM cell to reduce testing time
09/12/2000US6118692 Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
09/12/2000US6118691 Memory cell with a Frohmann-Bentchkowsky EPROM memory transistor that reduces the voltage across an unprogrammed memory transistor during a read
09/12/2000US6118690 Dual storage cell memory
09/12/2000US6118689 Two-port 6T CMOS SRAM cell structure for low-voltage VLSI SRAM with single-bit-line simultaneous read-and-write access (SBLSRWA) capability
09/12/2000US6118688 Ferroelectric memory device and method for driving it
09/12/2000US6118687 Nonvolatile ferroelectric memory without a separate cell plate line and method of manufacturing the same
09/12/2000US6118686 Memory device
09/12/2000US6118683 Dynamic random access memory cell layout
09/12/2000US6118624 Magneto-resistance effect element having a magnetic biasing film
09/12/2000US6118329 Negative charge pump using positive high voltage
09/12/2000US6118328 Semiconductor integrated circuit having virtual power supply line and power control transistor
09/12/2000US6118325 Semiconductor device capable of preventing ringing of output waveform
09/12/2000US6118319 Timing signal generation circuit
09/12/2000US6118315 Power-on-reset circuit providing protection against power supply interruptions
09/12/2000US6118304 Method and apparatus for logic synchronization
09/12/2000US6118135 Three-dimensional container diode for use with multi-state material in a non-volatile memory cell
09/12/2000US6117691 Method of making a single transistor ferroelectric memory cell with asymmetrical ferroelectric polarization
09/08/2000WO2000052771A1 Storage cell arrangement and method for producing the same
09/08/2000WO2000052702A1 Dual threshold voltage sram cell with bit line leakage control
09/08/2000WO2000052701A1 Storage cell arrangement and method for producing the same
09/08/2000WO2000052700A1 A non-volatile random access ferromagnetic memory with single collector sensor
09/08/2000WO2000052699A1 Magneto resistor sensor with diode short for a non-volatile random access ferromagnetic memory
09/08/2000WO2000052698A1 Dual conductor inductive sensor for a non-volatile random access ferromagnetic memory
09/08/2000WO2000052697A1 Magneto resistor sensor with differential collectors for a non-volatile random access ferromagnetic memory
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