| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 03/20/2001 | US6205071 Semiconductor memory device including sense amplifier circuit differing in drivability between data write mode and data read mode |
| 03/20/2001 | US6205070 Current sense amplifier |
| 03/20/2001 | US6205069 Semiconductor memory device with fast input/output line precharge scheme and method of precharging input/output lines thereof |
| 03/20/2001 | US6205068 Dynamic random access memory device having a divided precharge control scheme |
| 03/20/2001 | US6205067 Semiconductor memory device having burn-in mode operation stably accelerated |
| 03/20/2001 | US6205066 Dram array with gridded sense amplifier power source for enhanced column repair |
| 03/20/2001 | US6205064 Semiconductor memory device having program circuit |
| 03/20/2001 | US6205061 Efficient back bias (VBB) detection and control scheme for low voltage drams |
| 03/20/2001 | US6205053 Magnetically stable magnetoresistive memory element |
| 03/20/2001 | US6205052 Magnetic element with improved field response and fabricating method thereof |
| 03/20/2001 | US6205051 Stabilized magnetic memory cell |
| 03/20/2001 | US6205050 Programmed circuit in a semiconductor device |
| 03/20/2001 | US6205049 Five-transistor SRAM cell |
| 03/20/2001 | US6205048 Single transistor cell, method for manufacturing the same, memory circuit composed of single transistor cells, and method for driving the same |
| 03/20/2001 | US6205047 Data memory device having an exclusive-or function and method of reading data therefrom |
| 03/20/2001 | US6205046 Synchronous dynamic random-access memory |
| 03/20/2001 | US6204723 Bias circuit for series connected decoupling capacitors |
| 03/20/2001 | US6204538 SRAM cell |
| 03/20/2001 | US6204114 Method of making high density semiconductor memory |
| 03/20/2001 | CA2195836C Semiconductor memory having main word line and subword lines provided correspondingly to the main word line |
| 03/15/2001 | WO2001018816A1 Memory cell arrangement and operational method therefor |
| 03/15/2001 | WO2001018815A1 Self-erasing memory cell |
| 03/15/2001 | WO2001018814A1 Pseudo-differential current sense amplifier with hysteresis |
| 03/15/2001 | US20010000023 Semiconductor integrated circuit and data processing system |
| 03/15/2001 | DE19947118C1 Verfahren und Schaltungsanordnung zum Bewerten des Informationsgehalts einer Speicherzelle Method and circuit for evaluating the information content of a memory cell |
| 03/15/2001 | DE19942447A1 Speicherzellenanordnung und Verfahren zu deren Betrieb Memory cell arrangement and method of operation |
| 03/15/2001 | DE19942437A1 Selbstlöschende Speicherzelle Self-extinguishing memory cell |
| 03/15/2001 | DE10038228A1 Cellblock structure of non-volatile ferroelectric memory (FRAM), includes capacitor of ferroelectric material having high residual polarization for retaining data after removal of electric field |
| 03/15/2001 | DE10014112A1 Multi-bank semiconductor memory device circuit arrangement, has column decoder blocks arranged between adjacent pairs of memory banks in which at least one global E/A line pair extends to adjacent memory bank |
| 03/14/2001 | EP1083571A1 Semiconductor device with decreased power consumption |
| 03/14/2001 | EP1083570A1 Method for clearing memory contents and memory array capable of performing the same |
| 03/14/2001 | EP1082764A1 Semiconductor current-switching device having operational enhancer and method therefor |
| 03/14/2001 | EP1082763A1 Nrom cell with improved programming, erasing and cycling |
| 03/14/2001 | EP1082725A1 Magnetoresistive random access memory and method for reading/writing digital information to such a memory |
| 03/14/2001 | EP0978123A4 Voltage sense amplifier and methods for implementing the same |
| 03/14/2001 | EP0966742A4 Pump control circuit |
| 03/13/2001 | US6202194 Method and apparatus for routing 1 of N signals |
| 03/13/2001 | US6202180 Semiconductor memory capable of relieving a defective memory cell by exchanging addresses |
| 03/13/2001 | US6202119 Method and system for processing pipelined memory commands |
| 03/13/2001 | US6201760 Apparatus and method for performing data read operation in DDR SDRAM |
| 03/13/2001 | US6201758 Semiconductor memory device permitting time required for writing data to be reduced |
| 03/13/2001 | US6201757 Self-timed memory reset circuitry |
| 03/13/2001 | US6201756 Semiconductor memory device and write data masking method thereof |
| 03/13/2001 | US6201754 Semiconductor memory device having function of supplying stable power supply voltage |
| 03/13/2001 | US6201751 Integrated circuit power-up controllers, integrated circuit power-up circuits, and integrated circuit power-up methods |
| 03/13/2001 | US6201749 Semiconductor memory |
| 03/13/2001 | US6201748 Semiconductor memory device having test mode |
| 03/13/2001 | US6201746 Test method for high speed memory devices in which limit conditions for the clock are defined |
| 03/13/2001 | US6201744 Semiconductor memory circuit and redundancy control method |
| 03/13/2001 | US6201741 Storage device and a control method of the storage device |
| 03/13/2001 | US6201733 Semiconductor integrated circuit device, memory module and storage device |
| 03/13/2001 | US6201731 Electronic memory with disturb prevention function |
| 03/13/2001 | US6201730 Sensing of memory cell via a plateline |
| 03/13/2001 | US6201729 DRAM hidden row access method and apparatus |
| 03/13/2001 | US6201728 Dynamic RAM, semiconductor storage device, and semiconductor integrated circuit device |
| 03/13/2001 | US6201727 Nonvolatile ferroelectric random access memory device with segmented plate line scheme and a method for driving a plate line segment therein |
| 03/13/2001 | US6201724 Semiconductor memory having improved register array access speed |
| 03/13/2001 | US6201437 Internal high voltage generation circuit capable of stably generating internal high voltage and circuit element therefor |
| 03/13/2001 | US6201436 Bias current generating circuits and methods for integrated circuits including bias current generators that increase and decrease with temperature |
| 03/13/2001 | US6201378 Semiconductor integrated circuit |
| 03/13/2001 | US6201282 Two bit ROM cell and process for producing same |
| 03/13/2001 | US6201281 Semiconductor device and method for producing the same |
| 03/08/2001 | WO2001016999A2 New approach for multilevel mrom |
| 03/08/2001 | WO2001016958A1 Double data rate scheme for data output |
| 03/08/2001 | WO2001016957A1 Apparatus for analogue information transfer |
| 03/08/2001 | WO2001016956A1 Method and apparatus for supplying regulated power to memory device components |
| 03/08/2001 | WO2001016955A1 Circuit and method for a multiplexed redundancy scheme in a memory device |
| 03/08/2001 | WO2001016954A1 Pipeline structure of memory for high-fast row-cycle |
| 03/08/2001 | DE19941348A1 Memory access unit for selectively accessing static or dynamic memory has external address bus used for addressing static memory or dynamic memory in dependence on internal address word |
| 03/08/2001 | DE19940923A1 Read/write method for storing/extracting signal pattern using dynamic semiconductor store with data stored in form of matrix refresh each line with each read/write operation |
| 03/08/2001 | DE19913570C2 Betriebsverfahren für einen integrierten Speicher und integrierter Speicher A method of operating an integrated memory and built-in memory |
| 03/08/2001 | DE10033826A1 Semiconductor memory in the form of synchronous DRAMs designed with special data lead lengths and component spacings |
| 03/08/2001 | DE10031479A1 Power supply controller for semiconductor memory e.g. DRAM, connects power supply lines when electric potential difference between the lines is of preset value and when refresh operation mode of switch is active |
| 03/08/2001 | DE10024362A1 Semiconductor device operating on basis of constant current provided by constant current circuit damps noise generated in internal circuits with buffer circuits |
| 03/08/2001 | DE10023248A1 Schaltung und Verfahren zur Taktsignalsynchronisation und Zeit/Digital-Wandler hierfür Circuit and method for clock signal synchronization and time A / D converter for this purpose |
| 03/08/2001 | DE10020150A1 Semiconductor SRAM with reduced storage cell area and improved data retention interval has negative resistance section with tunnel insulating layer formed on active p-type region |
| 03/07/2001 | EP1081715A1 Logic-merged memory |
| 03/07/2001 | EP1081714A1 DRAM for storing data in pairs of cells |
| 03/07/2001 | EP1081713A1 Ferroelectric memory device with internally lowered supply voltage |
| 03/07/2001 | EP1081712A1 Serial access memory having data registers shared in units of a plurality of columns |
| 03/07/2001 | EP1081711A2 Dynamic type memory |
| 03/06/2001 | US6199139 Refresh period control apparatus and method, and computer |
| 03/06/2001 | US6199025 Semiconductor device having selectable device type and methods of testing device operation |
| 03/06/2001 | US6198690 Clock control circuit with an input stop circuit |
| 03/06/2001 | US6198689 Integrated circuit device with built-in self timing control circuit |
| 03/06/2001 | US6198688 Interface for synchronous semiconductor memories |
| 03/06/2001 | US6198686 Memory device having row decoder |
| 03/06/2001 | US6198683 Memory device |
| 03/06/2001 | US6198680 Circuit for resetting a pair of data buses of a semiconductor memory device |
| 03/06/2001 | US6198679 Semiconductor memory device |
| 03/06/2001 | US6198677 Boosted sensing ground circuit |
| 03/06/2001 | US6198674 Data strobe signal generator of semiconductor device using toggled pull-up and pull-down signals |
| 03/06/2001 | US6198671 Semiconductor memory device |
| 03/06/2001 | US6198670 Bias generator for a four transistor load less memory cell |
| 03/06/2001 | US6198660 Synchronous multilevel non-volatile memory and related reading method |
| 03/06/2001 | US6198658 High density flash memory architecture with columnar substrate coding |
| 03/06/2001 | US6198656 Asymmetric memory cell for single-ended sensing |
| 03/06/2001 | US6198654 Ferroelectric memory device and method of reading data therefrom |
| 03/06/2001 | US6198653 Ferroelectric memory |
| 03/06/2001 | US6198652 Non-volatile semiconductor integrated memory device |