| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 01/30/2001 | US6180427 Method of manufacture of a thermally actuated ink jet including a tapered heater element |
| 01/25/2001 | DE19944037C1 Integrated memory e.g. ferroelectric random access memory |
| 01/25/2001 | DE10034699A1 Read amplifier in non-volatile ferroelectric memory has data buses for both reading and writing data on their associated data buses and three amplifier stages |
| 01/25/2001 | DE10015253A1 Semiconducting memory device has memory cell arrangement with even, odd numbered cell blocks, address generator, odd, even column decoder, masking control signal and data generators |
| 01/25/2001 | DE10005460A1 Mehrwert-Masken-Nurlesespeicher Value-mask read-only memory |
| 01/24/2001 | EP1071209A2 Clock signal control circuit and method and synchronous delay circuit |
| 01/24/2001 | EP1071095A2 Memory acces method and system |
| 01/24/2001 | EP1071093A2 Semiconductor memory |
| 01/24/2001 | EP1070323A1 Page mode erase in a flash memory array |
| 01/24/2001 | CN1281260A Semiconductor storage device possessing redundancy function |
| 01/23/2001 | US6178537 Method and apparatus for performing error correction on data read from a multistate memory |
| 01/23/2001 | US6178518 Semiconductor memory system comprising synchronous DRAM and controller |
| 01/23/2001 | US6178501 Method and apparatus for initializing a memory device |
| 01/23/2001 | US6178483 Method and apparatus for prefetching data read by PCI host |
| 01/23/2001 | US6178479 Cycle-skipping DRAM for power saving |
| 01/23/2001 | US6178139 Semiconductor memory device comprised of a double data rate-synchronous dynamic random access memory |
| 01/23/2001 | US6178137 Clock-synchronizing semiconductor memory device |
| 01/23/2001 | US6178136 Semiconductor memory device having Y-select gate voltage that varies according to memory cell access operation |
| 01/23/2001 | US6178135 Multi-bank memory devices having bank selection switches therein that enable efficient sense amplifier utilization |
| 01/23/2001 | US6178134 Static random access memory with global bit-lines |
| 01/23/2001 | US6178131 Magnetic random access memory |
| 01/23/2001 | US6178130 Apparatus and method for refreshing subsets of memory devices in a memory system |
| 01/23/2001 | US6178125 Semiconductor memory device preventing repeated use of spare memory cell and repairable by cell substitution up to two times |
| 01/23/2001 | US6178123 Semiconductor device with circuit for phasing internal clock signal |
| 01/23/2001 | US6178122 Boosted-voltage drive circuit operable with high reliability and semiconductor memory device employing the same |
| 01/23/2001 | US6178121 Semiconductor memory device, semiconductor device, and electronic apparatus using the semiconductor device |
| 01/23/2001 | US6178118 Electrically programmable semiconductor device with multi-level wordline voltages for programming multi-level threshold voltages |
| 01/23/2001 | US6178116 Memory cell of non-volatile semiconductor memory device |
| 01/23/2001 | US6178115 Semiconductor memory device and storage method thereof |
| 01/23/2001 | US6178114 Sensing apparatus and method for fetching multi-level cell data |
| 01/23/2001 | US6178113 Dual floating gate programmable read only memory cell structure and method for its fabrication and operation |
| 01/23/2001 | US6178112 Element exploiting magnetic material and addressing method therefor |
| 01/23/2001 | US6178111 Method and apparatus for writing data states to non-volatile storage devices |
| 01/23/2001 | US6178109 Integrated circuit memory devices having reduced susceptibility to reference voltage signal noise |
| 01/23/2001 | US6178108 Semiconductor memory device |
| 01/23/2001 | US6178107 Ferroelectric random access memory device capable of reducing operation frequency of reference cell |
| 01/23/2001 | US6177831 Semiconductor integrated circuit with well potential control circuit |
| 01/23/2001 | US6177823 Pincer movement delay circuit for producing output signal different in repetition period from input signal |
| 01/23/2001 | US6177816 Interface circuit and method of setting determination level therefor |
| 01/23/2001 | US6177810 Adjustable strength driver circuit and method of adjustment |
| 01/23/2001 | US6177694 Dynamic random access memory device |
| 01/23/2001 | US6177693 Semiconductor device |
| 01/23/2001 | US6177300 Memory with storage cells having SOI drive and access transistors with tied floating body connections |
| 01/23/2001 | US6177204 Ferromagnetic GMR material and method of forming and using |
| 01/18/2001 | WO2001004970A1 Ferromagnetic double quantum well tunnel magneto-resistance device |
| 01/18/2001 | DE10021347A1 Semiconductor memory component, uses comparator during test mode to combine data read from memory cells for output at selected output terminal |
| 01/17/2001 | EP1069685A1 Fast propagation technique in CMOS integrated circuits |
| 01/17/2001 | EP1069573A1 Ferroelectric memory device with reset circuit |
| 01/17/2001 | EP1069504A2 Semiconductor memory device suitable for merging with logic |
| 01/17/2001 | EP1068620A1 High resolution multi-bit-per-cell memory |
| 01/17/2001 | EP1068619A1 Semiconductor memory asynchronous pipeline |
| 01/17/2001 | CN1280700A Semiconductor memory and method for accessing semiconductor memory |
| 01/17/2001 | CN1280386A Equipment and method for screening test of fault leakage of storage device |
| 01/16/2001 | US6175937 Apparatus and method for programming multistate memory device |
| 01/16/2001 | US6175901 Method for initializing and reprogramming a control operation feature of a memory device |
| 01/16/2001 | US6175534 Synchronous semiconductor storage device |
| 01/16/2001 | US6175533 Multi-port memory cell with preset |
| 01/16/2001 | US6175532 Fast accessible dynamic type semiconductor memory device |
| 01/16/2001 | US6175529 Semiconductor integrated circuit device and method for manufacturing the same |
| 01/16/2001 | US6175527 Semiconductor memory device having reduced component count and lower wiring density |
| 01/16/2001 | US6175525 Non-volatile storage latch |
| 01/16/2001 | US6175524 Merged memory and logic (MML) integrated circuit devices including buffer memory and methods of detecting errors therein |
| 01/16/2001 | US6175516 Semiconductor device |
| 01/16/2001 | US6175515 Vertically integrated magnetic memory |
| 01/16/2001 | US6175258 Methods and circuits for compensating clock signals having different loads in packaged integrated circuits using phase adjustments |
| 01/16/2001 | US6175252 Driver circuit |
| 01/16/2001 | US6174737 Magnetic random access memory and fabricating method thereof |
| 01/11/2001 | WO2001003198A1 Memory cell arrangement |
| 01/11/2001 | WO2001003190A1 Semiconductor integrated circuit device |
| 01/11/2001 | WO2001003139A1 Testing rambus memories |
| 01/11/2001 | WO2001003126A2 High density non-volatile memory device |
| 01/11/2001 | DE4236099C2 Redundanzspalten-Schaltkreis für eine Halbleiter-Speichervorrichtung Redundancy columns circuit for a semiconductor memory device |
| 01/11/2001 | DE19929725A1 Integrated circuit, SGRAM and decoder unit |
| 01/11/2001 | DE19929172A1 Integrated memory, double data rate DRAM |
| 01/11/2001 | DE10029240A1 Semiconducting memory has redundancy assessment circuit, control circuit that activates redundancy decoder, deactivates normal word decoder if external address corresp. to faulty cell |
| 01/10/2001 | EP1067557A1 Flash compatible EEPROM |
| 01/10/2001 | EP1067556A1 RAM memory |
| 01/10/2001 | EP1066637A1 Multi-level data through a single input/output pin |
| 01/10/2001 | EP0906622B1 Multi-level memory circuit with regulated reading voltage |
| 01/10/2001 | CN1279765A Method for detecting current of spin polarized electrons in solid body |
| 01/10/2001 | CN1279512A Synchronous data collecting circuit with low voltage level and method therefor |
| 01/09/2001 | US6173432 Method and apparatus for generating a sequence of clock signals |
| 01/09/2001 | US6173379 Memory device for a microprocessor register file having a power management scheme and method for copying information between memory sub-cells in a single clock cycle |
| 01/09/2001 | US6172938 Electronic instrument and semiconductor memory device |
| 01/09/2001 | US6172934 Semiconductor memory device preventing a malfunction caused by a defective main word line |
| 01/09/2001 | US6172932 On-chip voltage generating device for semiconductor memory with reduced stand-by current |
| 01/09/2001 | US6172931 Semiconductor memory device with a multi-bank structure |
| 01/09/2001 | US6172928 Semiconductor memory device with normal mode and power down mode |
| 01/09/2001 | US6172925 Memory array bitline timing circuit |
| 01/09/2001 | US6172924 Memory device with a sense amplifier |
| 01/09/2001 | US6172922 Semiconductor memory device having a single transistor two functions as a GND/Y selecting transistor and a precharge selecting transistor |
| 01/09/2001 | US6172919 Semiconductor memory device with independently controlled reading and writing time periods |
| 01/09/2001 | US6172918 Semiconductor memory device allowing high-speed operation of internal data buses |
| 01/09/2001 | US6172913 Method for fast programming floating gate memories by tunnel effect |
| 01/09/2001 | US6172912 Programming method for a nonvolatile semiconductor memory |
| 01/09/2001 | US6172908 Controlled hot-electron writing method for non-volatile memory cells |
| 01/09/2001 | US6172907 Silicon-oxide-nitride-oxide-semiconductor (SONOS) type memory cell and method for retaining data in the same |
| 01/09/2001 | US6172905 Method of operating a semiconductor device |
| 01/09/2001 | US6172904 Magnetic memory cell with symmetric switching characteristics |
| 01/09/2001 | US6172903 Hybrid device, memory apparatus using such hybrid devices and information reading method |