| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 06/13/2000 | US6075744 Dram core refresh with reduced spike current |
| 06/13/2000 | US6075743 Method and apparatus for sharing sense amplifiers between memory banks |
| 06/13/2000 | US6075741 Multiple staged power up of integrated circuit |
| 06/13/2000 | US6075740 Method and apparatus for increasing the time available for refresh for 1-t SRAM compatible devices |
| 06/13/2000 | US6075739 Semiconductor storage device performing self-refresh operation in an optimal cycle |
| 06/13/2000 | US6075738 Semiconductor memory device |
| 06/13/2000 | US6075736 Semiconductor memory device with improved sense amplifier driver |
| 06/13/2000 | US6075735 Semiconductor memory device having reversing logic means |
| 06/13/2000 | US6075734 Integrated circuit memory device for storing a multi-bit data and a method for reading stored data in the same |
| 06/13/2000 | US6075732 Semiconductor memory device with redundancy circuit |
| 06/13/2000 | US6075729 High-speed static random access memory |
| 06/13/2000 | US6075728 Semiconductor memory device accessible at high speed |
| 06/13/2000 | US6075725 Multilevel memory devices having memory cell referenced word line voltage generators with predetermined offsets |
| 06/13/2000 | US6075722 Semiconductor multivalued memory device determining multivalued read-out datum by comparing it with corresponding reference data |
| 06/13/2000 | US6075721 Random access memory having bit selectable mask for memory writes |
| 06/13/2000 | US6075720 Memory cell for DRAM embedded in logic |
| 06/13/2000 | US6075719 Method of programming phase-change memory element |
| 06/13/2000 | US6075404 Substrate biasing circuit and semiconductor integrated circuit device |
| 06/13/2000 | US6075397 Semiconductor integrated circuit |
| 06/13/2000 | US6075393 Clock synchronous semiconductor device system and semiconductor devices used with the same |
| 06/13/2000 | US6075265 DRAM cell arrangement and method for its fabrication |
| 06/13/2000 | US6074916 FLASH-EPROM with embedded EEPROM |
| 06/08/2000 | WO2000033316A1 DRIVE METHOD FOR FeRAM MEMORY CELL AND DRIVE DEVICE FOR THE MEMORY CELL |
| 06/08/2000 | WO2000033200A1 Method and apparatus for high speed data capture using bit-to-bit timing correction, and memory device using same |
| 06/08/2000 | WO2000032258A1 A method and a system for assisting a user in a medical self treatment, said self treatment comprising a plurality of actions |
| 06/08/2000 | WO2000010172A3 Storage cell array and corresponding production method |
| 06/08/2000 | DE19956550A1 Large scale integrated circuit has reference potential control circuit for controlling reference potential within each memory device of large scale integrated circuit |
| 06/08/2000 | DE19923397A1 Voltage pump circuit, especially for semiconductor memory components e.g. DRAM, outputs first high voltage from first voltage pump unit if second high voltage from second voltage pump is present |
| 06/08/2000 | DE19914489C1 Memory cell condition evaluation device for magnetoresistive memory |
| 06/07/2000 | EP1006444A2 Method and apparatus for testing random access memory device |
| 06/07/2000 | EP0907954B1 A method for a multiple bits-per-cell flash eeprom with page mode program and read |
| 06/07/2000 | EP0728361B1 Integrated circuit system for analog signal storing and recovery incorporating read while writing voltage program method |
| 06/07/2000 | CN1256005A Encoding method and memory device |
| 06/07/2000 | CN1255996A Storage appts. and writing and/or reading methods for use in hierarchical coding |
| 06/07/2000 | CN1255691A Power supply circuit builting integrated circuit |
| 06/07/2000 | CN1053285C Synchronous semiconductor memory device with write latency control function |
| 06/06/2000 | US6073223 Memory controller and method for intermittently activating and idling a clock signal for a synchronous memory |
| 06/06/2000 | US6073219 Semiconductor memory device with high speed read-modify-write function |
| 06/06/2000 | US6073208 Apparatus and method for reducing programming cycles for multistate memory system |
| 06/06/2000 | US6073203 Method for the continuous readout of a data sequence from a memory |
| 06/06/2000 | US6072749 Memory device preventing a slow operation through a mask signal |
| 06/06/2000 | US6072748 Memory cell of nonvolatile semiconductor memory device |
| 06/06/2000 | US6072747 High-speed current setting systems and methods for integrated circuit output drivers |
| 06/06/2000 | US6072744 Memory device having data bus lines of uniform length |
| 06/06/2000 | US6072742 Semiconductor memory device with a voltage down converter stably generating an internal down-converted voltage |
| 06/06/2000 | US6072740 Apparatus for reducing the effects of power supply distribution related noise |
| 06/06/2000 | US6072739 Semiconductor memory device capable of attaining higher speed data reading and writing operations by making equalization operation suitable for single data line |
| 06/06/2000 | US6072738 Cycle time reduction using an early precharge |
| 06/06/2000 | US6072736 Semiconductor memory device |
| 06/06/2000 | US6072731 Semiconductor memory circuit |
| 06/06/2000 | US6072729 Data-output driver circuit and method |
| 06/06/2000 | US6072728 Data output buffer |
| 06/06/2000 | US6072724 Semiconductor integrated circuit for generating plurality of different reference levels |
| 06/06/2000 | US6072718 Magnetic memory devices having multiple magnetic tunnel junctions therein |
| 06/06/2000 | US6072717 Stabilized magnetic memory cell |
| 06/06/2000 | US6072716 Memory structures and methods of making same |
| 06/06/2000 | US6072715 Memory circuit and method of construction |
| 06/06/2000 | US6072713 Data storage circuit using shared bit line and method therefor |
| 06/06/2000 | US6072711 Ferroelectric memory device without a separate cell plate line and method of making the same |
| 06/06/2000 | US6072347 Delay locked circuit |
| 06/06/2000 | US6071750 Method of manufacture of a paddle type ink jet printer |
| 06/02/2000 | WO2000031871A1 Improved flip-flops and other logic circuits and techniques for improving layouts of integrated circuits |
| 06/02/2000 | WO2000031809A1 Magnetoresistive element and utilisation thereof as a storage element in a storage cell array |
| 06/02/2000 | WO2000031745A1 Ampic dram |
| 06/02/2000 | CA2351656A1 Ampic dram |
| 05/31/2000 | EP1005165A2 Delay lock loop circuit |
| 05/31/2000 | EP1005046A2 Semiconductor memory device |
| 05/31/2000 | EP1004956A2 Integrated I/O circuit using a high performance bus interface |
| 05/31/2000 | EP1004119A1 A dynamic random access memory system with simultaneous access and refresh operations and methods for using the same |
| 05/31/2000 | EP0907955B1 A multiple bits-per-cell flash shift register page buffer |
| 05/31/2000 | DE19956465A1 Control circuit for data I/O buffer has control unit that controls I/O buffer so that data input buffer is deactivated in read mode and data output buffer is activated |
| 05/31/2000 | DE19954845A1 NAND type non-volatile ferroelectric memory cell has bit line, word lines, signal line to last transistor's gate, ferroelectric capacitors connected to word lines and transistor outputs |
| 05/31/2000 | DE19914488C1 Cell resistance evaluation device for magnetoresistive memory |
| 05/31/2000 | CN1254990A Improved delay lockloop |
| 05/31/2000 | CN1254929A Magnetic storage |
| 05/31/2000 | CN1254928A Address strobe signal generator for memory |
| 05/31/2000 | CN1254927A Magnetic storage array with asymmetric storage unit pairs and improved write-in tolerance |
| 05/30/2000 | US6070222 Synchronous memory device having identification register |
| 05/30/2000 | US6070217 High density memory module with in-line bus switches being enabled in response to read/write selection state of connected RAM banks to improve data bus performance |
| 05/30/2000 | US6069839 Circuit and method for implementing single-cycle read/write operation(s), and random access memory including the circuit and/or practicing the method |
| 05/30/2000 | US6069838 Semiconductor memory device having sub-word line driving circuit |
| 05/30/2000 | US6069837 Row decoder circuit for an electronic memory device, particularly for low voltage applications |
| 05/30/2000 | US6069836 Method and apparatus for a RAM circuit having N-nary word line generation |
| 05/30/2000 | US6069835 Semiconductor memory device |
| 05/30/2000 | US6069832 Method for multiple staged power up of integrated circuit |
| 05/30/2000 | US6069831 Semiconductor read-only memory with selection circuitry for routing dummy memory cell data to memory cell main bit lines |
| 05/30/2000 | US6069830 Circuit and method for sensing memory cell having multiple threshold voltages |
| 05/30/2000 | US6069829 Internal clock multiplication for test time reduction |
| 05/30/2000 | US6069828 Semiconductor memory device having voltage booster circuit |
| 05/30/2000 | US6069823 Nonvolatile semiconductor memory device |
| 05/30/2000 | US6069821 Device for sensing data in a multi-bit memory cell using a multistep current source |
| 05/30/2000 | US6069820 Spin dependent conduction device |
| 05/30/2000 | US6069819 Variable threshold voltage DRAM cell |
| 05/30/2000 | US6069817 Memory device evaluation methods using test capacitor patterns |
| 05/30/2000 | US6069816 High-speed responding data storing device for maintaining stored data without power supply |
| 05/30/2000 | US6069815 Semiconductor memory having hierarchical bit line and/or word line architecture |
| 05/30/2000 | US6069813 System with meshed power and signal buses on cell array |
| 05/30/2000 | US6069812 Integrated circuit memory devices including rows of pads extending parallel to the short sides of the integrated circuit |
| 05/30/2000 | US6069639 Video camera system and semiconductor image memory circuit applied to it |
| 05/30/2000 | US6069536 Ring oscillator including chain of plural series-connected comparators controlling by clock |