| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 08/06/2002 | US6430084 Magnetic random access memory having digit lines and bit lines with a ferromagnetic cladding layer |
| 08/06/2002 | US6430082 Selective device coupling |
| 08/06/2002 | US6430081 Selective device coupling |
| 08/06/2002 | US6430080 Integrated ferroelectric memory having plate lines selected by a column decoder |
| 08/06/2002 | US6430077 Method for regulating read voltage level at the drain of a cell in a symmetric array |
| 08/06/2002 | US6430076 Multi-level signal lines with vertical twists |
| 08/06/2002 | US6429743 Signal conversion circuit for stable differential amplification and semiconductor device provided with the same as input buffer |
| 08/06/2002 | US6429730 Bias circuit for series connected decoupling capacitors |
| 08/06/2002 | US6429497 Method for improving breakdown voltage in magnetic tunnel junctions |
| 08/06/2002 | US6429492 Low-power CMOS device and logic gates/circuits therewith |
| 08/06/2002 | US6429449 Three-dimensional container diode for use with multi-state material in a non-volatile memory cell |
| 08/06/2002 | US6429080 Multi-level dram trench store utilizing two capacitors and two plates |
| 08/06/2002 | US6429065 Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device |
| 08/06/2002 | US6429063 NROM cell with generally decoupled primary and secondary injection |
| 08/06/2002 | CA2252926C All-metal, giant magnetoresistive, solid-state component |
| 08/01/2002 | WO2002059973A2 Serial mram device |
| 08/01/2002 | WO2002059941A2 A self-aligned cross-point mram device with aluminum metallization layers |
| 08/01/2002 | WO2002059901A1 Single-port multi-bank memory system having read and write buffers and method of operating same |
| 08/01/2002 | WO2002059900A1 Ferroelectric nonvolatile semi-conductor memory, and its driving method |
| 08/01/2002 | WO2002059899A2 Mram bit line word line architecture |
| 08/01/2002 | WO2002059898A2 Mram arrangement |
| 08/01/2002 | WO2002059897A1 Multiple ports memory-cell structure |
| 08/01/2002 | WO2002045090A3 Circuit for non-destructive, self-normalizing reading-out of mram memory cells |
| 08/01/2002 | WO2001003126A9 High density non-volatile memory device |
| 08/01/2002 | US20020103962 Data transfer system and data transfer method |
| 08/01/2002 | US20020103961 Semiconductor integrated circuit and data processing system |
| 08/01/2002 | US20020102799 Method for the integrated production of EEPROM and FLASH memory cells |
| 08/01/2002 | US20020101778 Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell |
| 08/01/2002 | US20020101776 Operation method of a SRAM device |
| 08/01/2002 | US20020101775 Non-volatile semiconductor memory device having sensitive sense amplifier structure |
| 08/01/2002 | US20020101774 Semiconductor memory device with controllable operation timing of sense amplifier |
| 08/01/2002 | US20020101773 Semiconductor memory device having intermediate voltage generating circuit |
| 08/01/2002 | US20020101767 Reference voltage generator for MRAM and method |
| 08/01/2002 | US20020101761 Non-volatile magnetic register |
| 08/01/2002 | US20020101760 Mram architecture and system |
| 08/01/2002 | US20020101759 Shared ground sram cell |
| 08/01/2002 | US20020101758 Design methodology for sensing resistance values of memory cells |
| 08/01/2002 | US20020101757 Semiconductor memory device and method of operation thereof |
| 08/01/2002 | US20020101756 Ferroelectric memory |
| 08/01/2002 | US20020101754 Semiconductor memory device including an SOI |
| 08/01/2002 | US20020101277 Voltage boost circuits using multi-phase clock signals and methods of operating same |
| 08/01/2002 | US20020100944 Semiconductor integrated circuit device |
| 08/01/2002 | US20020100920 Sram device |
| 08/01/2002 | US20020100918 T-RAM array having a planar cell structure and method for fabricating the same |
| 07/31/2002 | EP1227501A2 Programming and erasing methods for an NROM array |
| 07/31/2002 | EP1227498A2 An EEPROM array and method for operation thereof |
| 07/31/2002 | EP1227495A2 Information storage device |
| 07/31/2002 | EP1227494A2 Magnetic random access memory |
| 07/31/2002 | EP1226878A2 Aligned fine particles, method for producing the same and device using the same |
| 07/31/2002 | EP1226585A1 Device for analysis of a signal from a ferroelectric storage capacitor |
| 07/31/2002 | EP1157388B1 Storage cell arrangement and method for producing the same |
| 07/31/2002 | EP1141835B1 Integrated memory with redundancy |
| 07/31/2002 | CN1361535A 磁随机存取存储器 Magnetic random access memory |
| 07/31/2002 | CN1361534A Thin film magnetic storaging apparatus having storing unit with magnetic tunnel joint part |
| 07/30/2002 | US6427197 Semiconductor memory device operating in synchronization with a clock signal for high-speed data write and data read operations |
| 07/30/2002 | US6426916 Memory device having a variable data output length and a programmable register |
| 07/30/2002 | US6426915 Fast cycle RAM and data readout method therefor |
| 07/30/2002 | US6426914 Floating wordline using a dynamic row decoder and bitline VDD precharge |
| 07/30/2002 | US6426913 Semiconductor memory device and layout method thereof |
| 07/30/2002 | US6426912 Test circuit for testing semiconductor memory |
| 07/30/2002 | US6426909 Semiconductor memory |
| 07/30/2002 | US6426908 Semiconductor memory device with reduced current consumption in data hold mode |
| 07/30/2002 | US6426907 Reference for MRAM cell |
| 07/30/2002 | US6426906 Read-out circuit |
| 07/30/2002 | US6426905 High speed DRAM local bit line sense amplifier |
| 07/30/2002 | US6426902 Semiconductor memory device having redundancy circuit capable of improving redundancy efficiency |
| 07/30/2002 | US6426901 Logic consolidated semiconductor memory device having memory circuit and logic circuit integrated in the same chip |
| 07/30/2002 | US6426900 Synchronous semiconductor memory device performing data output in synchronization with external clock |
| 07/30/2002 | US6426899 Integrated memory with a buffer circuit |
| 07/30/2002 | US6426893 Flash eeprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks |
| 07/30/2002 | US6426892 Nonvolatile semiconductor memory device for storing multivalued data |
| 07/30/2002 | US6426891 Nonvolatile memory with a two-terminal switching element and its driving method |
| 07/30/2002 | US6426890 Shared ground SRAM cell |
| 07/30/2002 | US6426889 Semiconductor integrated circuit |
| 07/30/2002 | US6426692 Data transfer method for a scanning identification system |
| 07/30/2002 | US6426671 Internal voltage generating circuit |
| 07/30/2002 | US6426560 Semiconductor device and memory module |
| 07/30/2002 | US6425657 Ink jet with coiled actuator |
| 07/25/2002 | WO2002058167A1 Spin switch and magnaetic storage elemet using it |
| 07/25/2002 | WO2002058166A1 Magnetic storage element, production method and driving method therefor, and memory array |
| 07/25/2002 | WO2002058072A2 Dynamic dram refresh rate adjustment based on cell leakage monitoring |
| 07/25/2002 | WO2002058070A2 Selection device for a semiconductor memory device |
| 07/25/2002 | US20020099988 Circuit for reading non-volatile memories |
| 07/25/2002 | US20020099963 Low power consumption semiconductor integrated circuit device and microprocessor |
| 07/25/2002 | US20020099896 Integrated circuit device having double data rate capability |
| 07/25/2002 | US20020098281 Copper damascene back-end-of-line structures are embedded with magnetic metal stacks |
| 07/25/2002 | US20020097630 Semiconductor memory device with a hierarchical word line configuration capable of preventing leakage current in a sub-word line driver |
| 07/25/2002 | US20020097629 Semiconductor memory device comprising more than two internal banks of different sizes |
| 07/25/2002 | US20020097628 Semiconductor integrated circuit device |
| 07/25/2002 | US20020097626 Semiconductor memory device |
| 07/25/2002 | US20020097625 Semiconductor memory device with a self refresh mode |
| 07/25/2002 | US20020097624 Refresh control circuit for low-power sram applications |
| 07/25/2002 | US20020097623 Semiconductor integration circuit device |
| 07/25/2002 | US20020097622 Semiconductor memory and method of operating the same |
| 07/25/2002 | US20020097620 Integrated memory having a cell array and charge equalization devices, and method for the accelerated writing of a datum to the integrated memory |
| 07/25/2002 | US20020097617 Static semiconductor memory device capable of accurately detecting failure in standby mode |
| 07/25/2002 | US20020097614 Semiconductor memory device having sensing power driver |
| 07/25/2002 | US20020097613 Self-healing memory |
| 07/25/2002 | US20020097610 Semiconductor device |
| 07/25/2002 | US20020097604 Semiconductor memory device having faulty cells |