| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 07/25/2002 | US20020097603 Nonvolatile semiconductor memory device |
| 07/25/2002 | US20020097602 Current source and drain arrangement for magnetoresistive memories (MRAMS) |
| 07/25/2002 | US20020097601 Non-orthogonal MRAM device |
| 07/25/2002 | US20020097600 Self-aligned cross-point MRAM device with aluminum metallization layers |
| 07/25/2002 | US20020097599 Magnetic random access memory |
| 07/25/2002 | US20020097598 Serial MRAM device |
| 07/25/2002 | US20020097597 MRAM bit line word line architecture |
| 07/25/2002 | US20020097596 Nonvolatile semiconductor memory device |
| 07/25/2002 | US20020097079 Addressable diode isolated thin film array |
| 07/25/2002 | US20020097074 Synchronous semiconductor device for adjusting phase offset in a delay locked loop |
| 07/25/2002 | US20020096735 Re-settable tristate programmable device |
| 07/25/2002 | US20020096702 Semiconductor memory device |
| 07/25/2002 | US20020096698 Unipolar spin diode and transistor and the applications of the same |
| 07/25/2002 | US20020096694 Semiconductor device |
| 07/25/2002 | US20020096690 Manufacture of semiconductor capacitively-coupled NDR device for applications such as high-density high-speed memories and power switches |
| 07/25/2002 | US20020096689 Semiconductor capacitively-coupled NDR device and related applications in high-density high-speed memories and in power switches |
| 07/25/2002 | DE10200389A1 Ferroelektrische Speichervorrichtungen mit Speicherzellen in einer Zeile, die mit verschiedenen Elektrodenleitungen verbunden sind Ferroelectric memory devices with memory cells in a row that are connected to different electrode lines |
| 07/25/2002 | DE10152027A1 Synchroner Hochgeschwindigkeits-Halbleiterspeicher mit einer Vielstufen-Pipeline-Struktur und Betriebsverfahren Synchronous high-speed semiconductor memory having a multi-stage pipeline structure and method of operation |
| 07/25/2002 | DE10107380C1 Magnetoresistive memory cell write-in method uses currents supplied to word line and bit line for providing superimposed magnetic fields causing alteration in magnetization direction |
| 07/25/2002 | DE10060432A1 Magnetoresistiver Speicher und Verfahren zu seinem Auslesen Magnetoresistive memory and method for its reading |
| 07/24/2002 | EP1225596A2 Programming and erasing methods for a reference cell of an NROM array |
| 07/24/2002 | EP1225595A1 Method and circuit for dynamic reading of a memory cell, in particular a multi-level nonvolatile memory cell |
| 07/24/2002 | EP1225594A2 Circuit and method for asynchronously accessing a ferroelectric memory device |
| 07/24/2002 | EP1225593A1 Magnetic device based on spin polarization and rotating magnetization, memory and writing procedure utlilizing said device |
| 07/24/2002 | EP1225592A2 Information storage device |
| 07/24/2002 | EP1225591A2 Magnetic random access memory |
| 07/24/2002 | EP1225589A2 Semiconductor memory device having a plurality of low power consumption modes |
| 07/24/2002 | EP1225588A2 Method and circuit for determining sense amplifier sensitivity |
| 07/24/2002 | EP1225587A2 Reading memory cells |
| 07/24/2002 | EP1224667A1 Configurable synchronizer for double data rate synchronous dynamic random access memory |
| 07/24/2002 | EP0925551B1 Method for tuning an oscillating receiver circuit of a transponder built into a rfid system |
| 07/24/2002 | EP0694214B1 Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom |
| 07/24/2002 | CN1360314A Multiport memory based on dynamic random access memory core |
| 07/24/2002 | CN1088215C Memory controlled which executes read and write commands out of order |
| 07/23/2002 | US6424593 Semiconductor memory device capable of adjusting internal parameter |
| 07/23/2002 | US6424590 Semiconductor device |
| 07/23/2002 | US6424589 Semiconductor memory device and method for accessing memory cell |
| 07/23/2002 | US6424586 Semiconductor integrated circuit device and method of activating same |
| 07/23/2002 | US6424585 Semiconductor memory device with a voltage down converter stably generating an internal down-converted voltage |
| 07/23/2002 | US6424582 Semiconductor memory device having redundancy |
| 07/23/2002 | US6424580 Memory with an optimized setting of precharge times |
| 07/23/2002 | US6424579 Semiconductor memory device with internal power supply potential generation circuit |
| 07/23/2002 | US6424577 Sense amplifier circuit for use in a semiconductor memory device |
| 07/23/2002 | US6424569 User selectable cell programming |
| 07/23/2002 | US6424566 Program reconnaissance to eliminate variations in vt distributions of multi-level cell flash memory designs |
| 07/23/2002 | US6424565 Solid-state memory with magnetic storage cells |
| 07/23/2002 | US6424564 MRAM architectures for increased write selectivity |
| 07/23/2002 | US6424563 MRAM memory cell |
| 07/23/2002 | US6424562 Read/write architecture for MRAM |
| 07/23/2002 | US6424561 MRAM architecture using offset bits for increased write selectivity |
| 07/23/2002 | US6424559 Method and apparatus for sense amplification |
| 07/23/2002 | US6424558 Ferroelectric memory array composed of a multiplicity of memory cells each having at least one selection transistor and one storage capacitor driven via word lines and bit lines |
| 07/23/2002 | US6424554 Semiconductor memory with multistage local sense amplifier |
| 07/23/2002 | US6424553 Multidimensional addressing architecture for electronic devices |
| 07/23/2002 | US6424206 Input circuit and output circuit |
| 07/23/2002 | US6424195 Dynamic flop with power down mode |
| 07/23/2002 | US6424142 Semiconductor device operable in a plurality of test operation modes |
| 07/23/2002 | US6424134 Semiconductor integrated circuit device capable of stably generating internal voltage independent of an external power supply voltage |
| 07/23/2002 | US6424121 Voltage generator switching between alternating, first and second voltage values, in particular for programming multilevel cells |
| 07/23/2002 | US6424015 Semiconductor integrated circuit device |
| 07/23/2002 | US6424011 Mixed memory integration with NVRAM, dram and sram cell structures on same substrate |
| 07/23/2002 | US6423553 Method of making a magnetoelectronic device |
| 07/18/2002 | WO2002056316A1 Nonvolatile semiconductor storage device |
| 07/18/2002 | WO2002035559A3 Magnetic layer formed of multiple sub-element layers |
| 07/18/2002 | WO2002007166A3 Mram architectures for increased write selectivity |
| 07/18/2002 | WO2001061703A3 Flash eeprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks |
| 07/18/2002 | US20020094697 DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating same |
| 07/18/2002 | US20020094626 Semiconductor memory device and write driving thereof |
| 07/18/2002 | US20020093872 Semiconductor integrated circuit, method of controlling the same, and variable delay circuit |
| 07/18/2002 | US20020093871 Synchronous memory devices with synchronized latency control circuits and methods of operating same |
| 07/18/2002 | US20020093870 Semiconductor memory device |
| 07/18/2002 | US20020093868 Actively driven V REF for input buffer noise immunity |
| 07/18/2002 | US20020093865 Semiconductor memory device |
| 07/18/2002 | US20020093864 Low-power semiconductor memory device |
| 07/18/2002 | US20020093863 Circuit and method for testing a memory device |
| 07/18/2002 | US20020093849 Thin film magnetic memory device capable of easily controlling a data write current |
| 07/18/2002 | US20020093848 Device for evaluating cell resistances in a magnetoresistive memory |
| 07/18/2002 | US20020093847 Ferroelectric storage device |
| 07/18/2002 | US20020093846 Nonvolatile ferroelectric memory device and method for detecting weak cell using the same |
| 07/18/2002 | US20020093845 Magnetic semiconductor memory apparatus and method of manufacturing the same |
| 07/18/2002 | US20020093843 Semiconductor integrated circuit device |
| 07/18/2002 | US20020093068 Magnetoelectronic memory element with inductively coupled write wires |
| 07/18/2002 | US20020093032 Semiconductor device |
| 07/18/2002 | DE10154879A1 Semiconductor memory device e.g. DRAM has MOS transistor which shares source region of bitline isolation transistors |
| 07/18/2002 | DE10154648A1 Semiconductor memory e.g. DRAM has sub word line driver which charges sub word line to boosting voltage irrespective of activation order between main word line signal and sub word line selection signal |
| 07/18/2002 | DE10141994A1 Halbleiterspeichervorrichtung zur Reduktion der Prüfzeitperiode A semiconductor memory device for reducing the Prüfzeitperiode |
| 07/18/2002 | DE10130829A1 Dünnfilmmagnetspeichervorrichtung mit Speicherzellen, die einen Magnettunnelübergang aufweisen The thin film magnetic memory device comprising memory cells having a magnetic tunnel junction |
| 07/18/2002 | DE10064031A1 Verfahren zum Auslesen und Speichern eines Zustandes aus einem oder in einen ferroelektrischen Transistor einer Speicherzelle und Speichermatrix A method for reading and storing a state from or in a ferroelectric transistor of a memory cell and memory array |
| 07/17/2002 | EP1223586A1 Nonvolatile memory for storing multibit data |
| 07/17/2002 | EP1223585A1 Tri-layer stack spin polarised magnetic device and memory using the same |
| 07/17/2002 | EP1223584A2 Memory device and method for handling out of range addresses |
| 07/17/2002 | EP1223583A2 High-speed cycle clock-synchronous memory device |
| 07/17/2002 | EP1222689A2 Dram bit lines and support circuitry contacting scheme |
| 07/17/2002 | EP1222662A1 Polyvalent, magnetoresistive write/read memory and method for writing and reading a memory of this type |
| 07/17/2002 | EP1019913B1 Memory cell arrangement |
| 07/17/2002 | EP0931288B1 Layout for a semiconductor memory device having redundant elements |
| 07/17/2002 | CN1359099A Magnetic resistance effect device, magnetic head, magnetic recording equipment and storage device |
| 07/16/2002 | US6421797 Integrated circuit memory devices and methods for generating multiple parallel bit memory test results per clock cycle |
| 07/16/2002 | US6421796 Efficient memory addressing for convolutional interleaving |
| 07/16/2002 | US6421789 Synchronous semiconductor memory device capable of reducing test cost and method of testing the same |