Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
05/2002
05/01/2002CN1347120A Magnetoresistive random storage device
05/01/2002CN1347119A Mram装置 Mram device
05/01/2002CN1347118A Method for revising defective tunnel node
04/2002
04/30/2002US6381672 Speculative opening of a new page when approaching page boundary during read/write of isochronous streams
04/30/2002US6381671 Semiconductor integrated circuit and data processing system
04/30/2002US6381670 Flash memory array having maximum and minimum threshold voltage detection for eliminating over-erasure problem and enhancing write operation
04/30/2002US6381194 Output circuit for a double data rate dynamic random access memory, double data rate dynamic random access memory, method of clocking data out from a double data rate dynamic random access memory and method of providing a data strobe signal
04/30/2002US6381191 Fast accessible dynamic type semiconductor memory device
04/30/2002US6381190 Semiconductor memory device in which use of cache can be selected
04/30/2002US6381189 Semiconductor register element
04/30/2002US6381188 DRAM capable of selectively performing self-refresh operation for memory bank
04/30/2002US6381186 Dynamic random access memory
04/30/2002US6381182 Combined tracking of WLL and VPP low threshold voltage in DRAM array
04/30/2002US6381180 Distributed write data drivers for burst access memories
04/30/2002US6381172 Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
04/30/2002US6381171 Magnetic element, magnetic read head, magnetic storage device, magnetic memory device
04/30/2002US6381170 Ultra high density, non-volatile ferromagnetic random access memory
04/30/2002US6381169 High density non-volatile memory device
04/30/2002US6381168 Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device
04/30/2002US6381167 Semiconductor memory device including plurality of global data lines in parallel arrangement with low parasitic capacitance, and fabrication method thereof
04/30/2002US6380799 Internal voltage generation circuit having stable operating characteristics at low external supply voltages
04/30/2002US6380782 Integrated circuit
04/30/2002US6380597 Read-only memory and read-only memory device
04/30/2002US6380592 Low power RAM memory cell using a precharge line pulse during write operation
04/30/2002US6379978 Memory cell configuration in which an electrical resistance of a memory element represents an information item and can be influenced by a magnetic field, and method for fabricating it
04/25/2002WO2002033713A1 Magnetic element, memory device and write head
04/25/2002WO2002033706A2 Noise suppression for open bit line dram architectures
04/25/2002WO2002033705A2 Non-volatile magnetic memory device
04/25/2002WO2001056035A3 IT flash memory recovery scheme for over-erasure
04/25/2002US20020049946 Synchronous semiconductor memory device capable of performing operation test at high speed while reducing burden on tester
04/25/2002US20020049918 Method and apparatus for reducing leakage power in a cache memory
04/25/2002US20020049884 Semiconductor device, refreshing method thereof, memory system, and electronic instrument
04/25/2002US20020048947 Semiconductor integrated circuit device and the process of the same
04/25/2002US20020048211 Semiconductor memory device with a rapid packet data input, capable of operation check with low speed tester
04/25/2002US20020048210 Semiconductor memory device having hierarchical word line structure
04/25/2002US20020048209 Semiconductor memory having dual port cell supporting hidden refresh
04/25/2002US20020048208 Semiconductor device, refreshing method thereof, memory system, and electronic instrument
04/25/2002US20020048207 Data bus sense amplifier circuit
04/25/2002US20020048206 Method and apparatus for reducing bleed currents within a dram array having row-to-column shorts
04/25/2002US20020048205 Dynamic random access memory
04/25/2002US20020048201 First-in, first-out (FIFO) memory cell architecture
04/25/2002US20020048200 Integrated circuit memory devices having non-volatile memory transistors and methods of fabricating the same
04/25/2002US20020048197 Sdram having posted cas function of jedec standard
04/25/2002US20020048196 High-speed synchronous semiconductor memory having multi-stage pipeline structure and operating method
04/25/2002US20020048195 High speed data bus
04/25/2002US20020048194 High speed data bus
04/25/2002US20020048190 Insulated-gate field-effect transistor integrated with negative differential resistance (NDR) FET
04/25/2002US20020048187 Small size, low consumption, multilevel nonvolatile memory
04/25/2002US20020048186 Magnetic element, memory device and write head
04/25/2002US20020048185 Magnetoresistive memory and method for reading a magnetoresistive memory
04/25/2002US20020048184 Nonvolatile ferroelectric memory device and method for driving the same
04/25/2002US20020048183 High speed data bus
04/25/2002US20020048182 Memory circuit/logic circuit integrated device capable of reducing term of works
04/25/2002US20020047742 Semiconductor storage device with suppressed power consumption and reduced recovery time from suspend mode
04/25/2002US20020047741 Semiconductor device reduced in through current
04/25/2002US20020047731 Potential detecting circuit
04/25/2002US20020047725 Output driver having reduced power consumption and layout area
04/25/2002US20020047166 Semiconductor device
04/25/2002US20020047149 Four transistors static-random-access-memory cell
04/25/2002US20020047145 MRAM device including spin dependent tunneling junction memory cells
04/25/2002US20020047137 Semiconductor integrated circuit device having hierarchical test interface circuit
04/25/2002DE10147201A1 Semiconductor memory has sub word selecting circuit which switches selection of sub word selection line of memory cell array arranged on corresponding substrate plates using drivers
04/25/2002DE10129262A1 Non-volatile ferroelectric memory for use as random access memory with main cells arranged as lines with pairs of part word lines from a first and second part word line runs read/write data processes in a cell array.
04/25/2002DE10126878A1 Halbleitervorrichtung Semiconductor device
04/25/2002DE10119499A1 Dünnfilm-Magnetspeichervorrichtung zum leichten Steuern eines Datenschreibstroms A thin film magnetic memory device for easily controlling a data write current
04/25/2002DE10051173A1 Structure for reducing a voltage drop along a word/bit line operates during the reading of a memory cell in an MRAM memory's memory cell field with the memory cell placed at an intersecting point between selected word and bit lines.
04/25/2002DE10051164A1 Method for masking data bits to be input into a semiconductor memory by a memory controller gives the data bits to be masked an increased voltage level.
04/25/2002DE10050702A1 Memory module system for use as DRAM, has first and second module cards with DRAM components and ECC element to be plugged into first and second plug-in bases in a coordinated manner
04/24/2002EP1199725A1 Method for storing and reading data in a multibit nonvolatile memory with a non-binary number of bits per cell
04/24/2002EP1199724A1 Simply interfaced semiconductor integrated circuit device including logic circuitry and embedded memory circuitry
04/24/2002EP1199639A2 A semiconductor memory device with a large storage capacity memory and a fast speed memory
04/24/2002CN1346498A Magnetic materials
04/24/2002CN1346494A Integrated ferroelectric memory whose plate lines are selected by column decoder
04/24/2002CN1346493A Integrated memory with memory cells and reference cells and corresponding operating method
04/24/2002CN1346492A Device for weighting the cell resistances in magnetoresistive memory
04/24/2002CN1346156A Magnetic resistance element and magnetic device using same
04/24/2002CN1346155A 磁阻元件以及磁阻效应型存储元件 A magnetoresistance effect type magnetoresistive element and a memory element
04/24/2002CN1346151A Semicondcutor IC
04/24/2002CN1346131A Clock synchronous circuit
04/24/2002CN1346130A Non-volatile semiconductor memory
04/24/2002CN1346092A Reset device semiconductor IC device, semiconductor memory
04/24/2002CN1083607C 半导体存储器 Semiconductor memory
04/23/2002US6378118 Semiconductor integrated circuit having a MPU and a DRAM cache memory
04/23/2002US6378102 Synchronous semiconductor memory device with multi-bank configuration
04/23/2002US6378091 Test mode circuit capable of surely resetting test mode signals
04/23/2002US6378032 Bank conflict avoidance in multi-bank DRAMS with shared sense amplifiers
04/23/2002US6378020 System having double data transfer rate and intergrated circuit therefor
04/23/2002US6377638 Signal transmission system for transmitting signals between lsi chips, receiver circuit for use in the signal transmission system, and semiconductor memory device applying the signal transmission system
04/23/2002US6377513 Method for writing data to semiconductor memory and semiconductor memory
04/23/2002US6377512 Clock synchronous type semiconductor memory device that can switch word configuration
04/23/2002US6377511 Semiconductor integrated circuit device
04/23/2002US6377509 Semiconductor integrated circuit
04/23/2002US6377508 Dynamic semiconductor memory device having excellent charge retention characteristics
04/23/2002US6377507 Non-volatile memory device having high speed page mode operation
04/23/2002US6377506 Semiconductor device
04/23/2002US6377505 Semiconductor integrated circuit capable of reducing area occupied by data bus
04/23/2002US6377503 Synchronous dynamic random access memory
04/23/2002US6377501 Semiconductor integrated circuit device
04/23/2002US6377499 Refresh-free semiconductor memory device
04/23/2002US6377498 Nonvolatile ferroelectric memory device with row redundancy circuit and method for relieving failed address thereof