| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
|---|
| 09/03/2002 | US6445645 Random access memory having independent read port and write port and process for writing to and reading from the same |
| 09/03/2002 | US6445644 Apparatus and method for generating a clock within a semiconductor device and devices and systems including same |
| 09/03/2002 | US6445643 Method and apparatus for setting write latency |
| 09/03/2002 | US6445642 Synchronous double data rate DRAM |
| 09/03/2002 | US6445639 Integrated dynamic semiconductor memory with time controlled read access |
| 09/03/2002 | US6445638 Folded-bitline dual-port DRAM architecture system |
| 09/03/2002 | US6445637 Semiconductor memory device with a refresh function |
| 09/03/2002 | US6445636 Method and system for hiding refreshes in a dynamic random access memory |
| 09/03/2002 | US6445634 Serial access memory and data write/read method |
| 09/03/2002 | US6445633 Read amplifier circuit for high-speed reading and semiconductor memory device employing the read amplifier circuit |
| 09/03/2002 | US6445632 Semiconductor memory device for fast access |
| 09/03/2002 | US6445624 Method of synchronizing read timing in a high speed memory system |
| 09/03/2002 | US6445616 Nonvolatile memory sensing circuit and techniques thereof |
| 09/03/2002 | US6445613 Magnetic random access memory |
| 09/03/2002 | US6445612 MRAM with midpoint generator reference and method for readout |
| 09/03/2002 | US6445611 Method and arrangement for preconditioning in a destructive read memory |
| 09/03/2002 | US6445610 Variable voltage isolation gate and method |
| 09/03/2002 | US6445609 Integrated DRAM memory cell and DRAM memory |
| 09/03/2002 | US6445608 Ferroelectric random access memory configurable output driver circuit |
| 09/03/2002 | US6445607 Method for operating an integrated memory |
| 09/03/2002 | US6445604 Channel driving circuit of virtual channel DRAM |
| 09/03/2002 | US6445558 Semiconductor integrated circuit device having pseudo-tuning function |
| 09/03/2002 | US6445215 Logic circuit with single charge pulling out transistor and semiconductor integrated circuit using the same |
| 09/03/2002 | US6445091 Integrated semiconductor circuit having at least two supply networks |
| 09/03/2002 | US6445026 Semiconductor device having a memory cell with a plurality of active elements and at least one passive element |
| 09/03/2002 | US6445025 Semiconductor memory device and manufacturing method thereof |
| 09/03/2002 | US6445017 Full CMOS SRAM cell |
| 09/03/2002 | US6444554 Variation in threshold level of selective transistors is reduced when a shallow structure buried with an insulating film for element isolation is used |
| 08/29/2002 | WO2002067267A1 Multi-valued nonvolatile semiconductor storage |
| 08/29/2002 | WO2002067266A2 Method for writing into magnetoresistive memory cells and magnetoresistive memory which can be written into according to said method |
| 08/29/2002 | WO2002067265A2 Electronic circuit and method for accessing non-volatile memory |
| 08/29/2002 | WO2002067264A2 Method for reading a memory cell of a semiconductor memory, and semiconductor memory |
| 08/29/2002 | WO2002039455A3 Mram arrangement with selection transistors of large channel width |
| 08/29/2002 | US20020120820 Memory device for controlling nonvolatile and volatile memories |
| 08/29/2002 | US20020119635 Integrated resistor having aligned body and contact and method for forming the same |
| 08/29/2002 | US20020118593 Memory system |
| 08/29/2002 | US20020118590 Semiconductor memory device with low power consumption |
| 08/29/2002 | US20020118588 Semiconductor memory device and method for reading information of therefrom |
| 08/29/2002 | US20020118587 Semiconductor device |
| 08/29/2002 | US20020118585 Gate voltage testkey for isolation transistor |
| 08/29/2002 | US20020118578 Method of synchronizing read timing in a high speed memory system |
| 08/29/2002 | US20020118575 Semiconductor device |
| 08/29/2002 | US20020118574 Non-volatile memory with improved programming and method therefor |
| 08/29/2002 | US20020118570 Method of read operation of nonvolatile semiconductor memory and nonvolatile semiconductor memory |
| 08/29/2002 | US20020118563 High speed data capture circuit for a digital device |
| 08/29/2002 | US20020118047 Input-output line sense ampifier having small currnet consumption and direct current |
| 08/29/2002 | US20020118018 Semiconductor integrated circuit device, method of testing semiconductor integrated circuit device and method of manufacturing semiconductor integrated circuit device |
| 08/29/2002 | US20020117727 Magnetoelectronics element having a stressed over-layer configured for alteration of the switching energy barrier |
| 08/29/2002 | DE10206060A1 Speichersystem mit Stichleitungskonfiguration und zugehöriges Datenübertragungsverfahren Storage system with stub configuration and associated data transmission method |
| 08/29/2002 | DE10164283A1 Magnetspeichervorrichtung und Magnetsubstrat A magnetic memory device and magnet substrate |
| 08/29/2002 | DE10158714A1 Halbleiterspeicher mit Spiegelfunktion Semiconductor memory with mirror function |
| 08/29/2002 | DE10145153A1 Halbleiterspeichervorrichtung mit steuerbarer Operationszeit des Leseverstärkers A semiconductor memory device having a controllable operating time of the sense amplifier |
| 08/29/2002 | DE10135782A1 Halbleiterspeichervorrichtung A semiconductor memory device |
| 08/29/2002 | DE10132133A1 Statische Halbleiterspeichervorrichtung mit T-Typ-Bitleitungsstruktur Static semiconductor memory device with T-type bit line |
| 08/29/2002 | DE10105285A1 Halbleiterspeicher mit Precharge-Steuerung Semiconductor memory with precharge control |
| 08/29/2002 | DE10104701A1 Verfahren zum Einschreiben von Daten und Speicheranordnung A method for writing data and memory array |
| 08/29/2002 | DE10043440C2 Magnetoresistiver Speicher und Verfahren zu seinem Auslesen Magnetoresistive memory and method for its reading |
| 08/28/2002 | EP1235229A2 Method of read operation of nonvolatile semiconductor memory and nonvolatile semiconductor memory |
| 08/28/2002 | EP1235228A1 Semiconductor storage and method for testing the same |
| 08/28/2002 | EP1235225A2 Method and memory device for sequential memory reading with address jump |
| 08/28/2002 | EP1196925A4 Magnetic memory coincident thermal pulse data storage |
| 08/28/2002 | EP1066637B1 Multi-level data through a single input/output pin |
| 08/28/2002 | CN1366767A Storage medium, data obtaining apparatus, data holding apparatus, data obtaining method and data holding method |
| 08/28/2002 | CN1366712A Information processing structure |
| 08/27/2002 | US6442742 Cache memory having a DRAM memory cell |
| 08/27/2002 | US6442716 Data output buffer |
| 08/27/2002 | US6442525 System for authenticating physical objects |
| 08/27/2002 | US6442297 Storage apparatus and writing and/or reading methods for use in hierarchical coding |
| 08/27/2002 | US6442103 Synchronous SRAM device with late write function |
| 08/27/2002 | US6442101 Method and apparatus for reducing bleed currents within a DRAM array having row-to-column shorts |
| 08/27/2002 | US6442100 Integrated memory |
| 08/27/2002 | US6442099 Low power read scheme for memory array structures |
| 08/27/2002 | US6442097 Virtual channel DRAM |
| 08/27/2002 | US6442096 Fast accessing of a memory device |
| 08/27/2002 | US6442095 Semiconductor memory device with normal mode and power down mode |
| 08/27/2002 | US6442094 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array |
| 08/27/2002 | US6442088 Semiconductor memory system, and access control method for semiconductor memory and semiconductor memory |
| 08/27/2002 | US6442087 Semiconductor memory device with reduced interference between bit lines |
| 08/27/2002 | US6442084 Semiconductor memory having segmented row repair |
| 08/27/2002 | US6442078 Semiconductor memory device having structure implementing high data transfer rate |
| 08/27/2002 | US6442077 Controlling reading from and writing to a semiconductor memory device |
| 08/27/2002 | US6442065 Method for operating a memory cell configuration having dynamic gain memory cells |
| 08/27/2002 | US6442064 Magnetic tunnel junction element and magnetic memory using the same |
| 08/27/2002 | US6442063 Integrated memory having memory cells with magnetoresistive memory effect |
| 08/27/2002 | US6442062 Load-less four-transistor memory cell with different gate insulation thicknesses for N-channel drive transistors and P-channel access transistors |
| 08/27/2002 | US6442061 Single channel four transistor SRAM |
| 08/27/2002 | US6442060 High-density ratio-independent four-transistor RAM cell fabricated with a conventional logic process |
| 08/27/2002 | US6442059 Nonvolatile ferroelectric memory and method for fabricating the same |
| 08/27/2002 | US6441669 Internal power-source potential supply circuit, step-up potential generating system, output potential supply circuit, and semiconductor memory |
| 08/27/2002 | US6441659 Frequency-doubling delay locked loop |
| 08/27/2002 | US6441639 Circuit module connected to a transmission line including arrangement to suppress reflections at a branch point of the transmission line |
| 08/27/2002 | US6441638 Bus system and circuit board |
| 08/27/2002 | US6441448 Semiconductor storage device |
| 08/27/2002 | US6441425 Non-volatile semiconductor device and non-volatile semiconductor memory device for storing multi-value information |
| 08/27/2002 | US6441414 Ferroelectric field effect transistor, memory utilizing same, and method of operating same |
| 08/27/2002 | US6440754 Thin film ferroelectric capacitors having improved memory retention through the use of essentially smooth bottom electrode structures |
| 08/22/2002 | WO2002065475A2 Self-aligned conductive line for cross-point magnetic memory integrated circuits |
| 08/22/2002 | WO2002049034A3 Amplifier for reading storage cells with exclusive-or type function |
| 08/22/2002 | WO2002025667A3 Ferroelectric memory and method of operating same |
| 08/22/2002 | US20020116657 Command input circuit having command acquisition units which acquire a series of commands in synchronization with respective edges of clock signal |