Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
08/2002
08/22/2002US20020116572 Method of refreshing a dynamic memory
08/22/2002US20020115259 Integrated resistor having aligned body and contact and method for forming the same
08/22/2002US20020114209 Dynamic random access memory device and semiconductor integrated circuit device
08/22/2002US20020114207 Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells
08/22/2002US20020114206 Data memory with a plurality of memory banks
08/22/2002US20020114205 Semiconductor memory device capable of changing an address space thereof
08/22/2002US20020114203 Semiconductor integrated circuit with variable bit line precharging voltage
08/22/2002US20020114201 Semiconductor memory circuit
08/22/2002US20020114194 Multilevel storage nonvolatile semiconductor memory device enabling high-speed data reading and high-speed data writing
08/22/2002US20020114192 Nonvolatile memory and method of programming the same memory
08/22/2002US20020114191 Semiconductor memory device and method of manufacturing the same
08/22/2002US20020114186 Semiconductor apparatus
08/22/2002US20020114183 Nonvolatile semiconductor memory and read method
08/22/2002US20020114181 Multiple ports memory-cell structure
08/22/2002US20020114178 Semiconductor memory device and memory system
08/22/2002US20020114112 Magnetic tunnel element and its manufacturing method, thin-film magnetic head, magnetic memory and magnetic sensor
08/22/2002US20020113783 Display driver and display unit and electronic apparatus utilizing the same
08/22/2002US20020113636 Ferroelectric non-volatile logic elements
08/22/2002US20020113627 Input buffer circuit capable of suppressing fluctuation in output signal and reducing power consumption
08/22/2002US20020113623 Semiconductor integrated circuit and pulse signal generating method
08/22/2002US20020113254 Semiconductor memory device
08/22/2002US20020113253 Semiconductor memory device
08/22/2002US20020113250 Indium chalcogenide, gallium chalcogenide, and indium-gallium chalcogenide phase-change media for ultra-high-density data-storage devices
08/22/2002DE10103313A1 MRAM-Anordnung MRAM array
08/21/2002EP1233454A2 Semiconductor memory device and method of manufacturing the same
08/21/2002EP1233420A1 Method and circuit for dynamic reading of a memory cell at low supply voltage and with low output dynamics
08/21/2002EP1233419A2 Refreshing method of a dynamic memory
08/21/2002EP1233418A1 Phase-change media for ultra-high-density data-storage devices
08/21/2002EP1233417A2 Command input circuit
08/21/2002EP1233277A2 Memory designs for IC terminals
08/21/2002EP1232504A1 Method of manufacturing a spin valve structure
08/21/2002EP1232399A1 High-speed failure capture apparatus and method for automatic test equipment
08/21/2002CN1365152A Storage device having independant triode transistor and its operation and producing method
08/21/2002CN1365117A Heat auxiliary switching of magnetic random access storage device
08/21/2002CN1365116A Storage unit read-out based on non-contineous property
08/21/2002CN1089489C Set circuit for operation mode of semiconductor device
08/21/2002CN1089476C Video RAM and method for outputting serial data
08/21/2002CN1089475C Flash memory device
08/21/2002CN1089474C Fully integrated cache architecture
08/21/2002CN1089473C Synchronous semicondcutor memory device having an auto-precharge function
08/20/2002US6438645 Apparatus and structure for rapid enablement
08/20/2002US6438257 Small capacitance change detection device
08/20/2002US6438067 Clock generating circuit ensuring a wide lock-allowing frequency range and allowing reduction in layout area as well as a semiconductor device provided with the same
08/20/2002US6438066 Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system
08/20/2002US6438064 Semiconductor memory device capable of efficient memory cell select operation with reduced element count
08/20/2002US6438063 Integrated circuit memory devices having selectable column addressing and methods of operating same
08/20/2002US6438061 Dynamic random access memory with low power consumption
08/20/2002US6438058 Integrated circuit containing a number of subcircuits
08/20/2002US6438057 DRAM refresh timing adjustment device, system and method
08/20/2002US6438055 Dynamic memory circuit with automatic refresh function
08/20/2002US6438054 Semiconductor integrated circuit
08/20/2002US6438053 Integrated memory having memory cells and reference cells
08/20/2002US6438052 Semiconductor memory device having dummy cells around memory cells for serving as compensating capacitor and power supply system incorporated therein
08/20/2002US6438051 Stabilized direct sensing memory architecture
08/20/2002US6438050 Signal transmission circuit and semiconductor memory using the same
08/20/2002US6438049 Variable equilibrate voltage circuit for paired digit lines
08/20/2002US6438042 Arrangement of bitline boosting capacitor in semiconductor memory device
08/20/2002US6438034 Semiconductor device
08/20/2002US6438027 Nonvolatile memory, cell array thereof, and method for sensing data therefrom
08/20/2002US6438026 Magnetic field element having a biasing magnetic layer structure
08/20/2002US6438025 Magnetic memory device
08/20/2002US6438024 Combining RAM and ROM into a single memory array
08/20/2002US6438022 Memory cell configuration
08/20/2002US6438021 Methods of reading and writing data from/ on semiconductor memory device, and method for driving the device
08/20/2002US6438020 Ferroelectric memory device having an internal supply voltage, which is lower than the external supply voltage, supplied to the memory cells
08/20/2002US6438019 Ferroelectric random access memory (FeRAM) having storage capacitors with different coercive voltages
08/20/2002US6438016 Semiconductor memory having dual port cell supporting hidden refresh
08/20/2002US6438015 Semiconductor memory device and memory system for improving bus efficiency
08/20/2002US6438013 Semiconductor integrated circuit and method for adjusting characteristics of the same
08/20/2002US6438012 Directional coupling memory module
08/20/2002US6437640 Addressable diode isolated thin film array
08/20/2002US6437629 Semiconductor device with circuit for adjusting input/output terminal capacitance
08/20/2002US6437619 Clock generation circuit, control method of clock generation circuit, clock reproducing circuit, semiconductor memory device, and dynamic random access memory
08/20/2002US6437618 Delay locked loop incorporating a ring type delay and counting elements
08/20/2002US6437617 Method of controlling a clock signal and circuit for controlling a clock signal
08/20/2002US6437613 Clock generating circuit for compensation of delay difference using closed loop analog synchronous mirror delay structure
08/20/2002US6437410 Integrated memory
08/20/2002US6437396 Nonvolatile memory
08/20/2002US6436755 Dynamic random access memory cell and method for fabricating the same
08/20/2002US6436741 Semiconductor integrated circuit device
08/20/2002US6436526 Magneto-resistance effect element, magneto-resistance effect memory cell, MRAM and method for performing information write to or read from the magneto-resistance effect memory cell
08/15/2002WO2002063631A1 Volumetric electro optical recording
08/15/2002WO2002063630A1 Programming method using voltage pulse with stepped portions for multi-level cell flash memories
08/15/2002WO2002019389A3 Epitaxial template and barrier for the integration of functional thin film heterostructures on silicon
08/15/2002US20020112137 Partial trench body ties in sram cell
08/15/2002US20020112136 Data transfer memory having the function of transferring data on a system bus
08/15/2002US20020112117 Apparatus and method for controlling bank refresh
08/15/2002US20020110939 Semiconductor device and method of inspecting the same
08/15/2002US20020110042 Synthesizable synchronous static RAM
08/15/2002US20020110041 Semiconductor memory device with improved setup time and hold time
08/15/2002US20020110038 Fast random access DRAM management method
08/15/2002US20020110037 Dram interface circuit providing continuous access across row boundaries
08/15/2002US20020110036 Static memory cell having independent data holding voltage
08/15/2002US20020110023 Nonvolatile memory system
08/15/2002US20020110019 Nonvolatile semiconductor memory device
08/15/2002US20020110018 Semiconductor memory device
08/15/2002US20020110017 Voltage generator for semiconductor device
08/15/2002US20020110016 Semiconductor memory device including plurality of global data lines in parallel arrangement with low parasitic capacitance, and fabrication method thereof
08/15/2002US20020110015 Reduced area sense amplifier isolation layout in a dynamic ram architecture
08/15/2002US20020109539 Multi-level non-volatile semiconductor memory device with verify voltages having a smart temperature coefficient