Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
06/2002
06/27/2002DE10135558A1 Halbleiterspeichervorrichtung und Verfahren zu deren Herstellung A semiconductor memory device and methods for their preparation
06/27/2002DE10061693A1 Memory device operating method has plate lines for all memory cells in memory cell group combined
06/27/2002DE10061580A1 Speichereinrichtung und Verfahren zu deren Betrieb Memory means and method for its operation
06/26/2002EP1216478A1 Arrangement to reduce coupling noise between bitlines
06/26/2002EP1216476A1 Self-erasing memory cell
06/26/2002CN1355536A Semiconductor memory device with multiple low-pissipation module type
06/26/2002CN1355535A Method for avoiding unhoped programmed in magnetoresistive memory device
06/26/2002CN1086842C Semiconductor elemetn and data processing equipment used it
06/26/2002CN1086836C Semiconductor device and unit for driving same
06/25/2002US6411564 Semiconductor memory device and synchronous memory
06/25/2002US6411563 Semiconductor integrated circuit device provided with a logic circuit and a memory circuit and being capable of efficient interface between the same
06/25/2002US6411561 Semiconductor device including multi-chip
06/25/2002US6411560 Semiconductor memory device capable of reducing leakage current flowing into substrate
06/25/2002US6411559 Semiconductor memory device including a sense amplifier
06/25/2002US6411555 Reference charge generator, a method for providing a reference charge from a reference charge generator, a method of operating a reference charge generator and a dram memory circuit formed using memory cells having an area of 6f2
06/25/2002US6411554 High voltage switch circuit having transistors and semiconductor memory device provided with the same
06/25/2002US6411551 Multi-state nonvolatile semiconductor memory device which is capable of regularly maintaining a margin between threshold voltage distributions
06/25/2002US6411548 Semiconductor memory having transistors connected in series
06/25/2002US6411547 Nonvolatile memory cell and method for programming and/or verifying the same
06/25/2002US6411543 Dynamic random access memory (RAM), semiconductor storage device, and semiconductor integrated circuit (IC) device
06/25/2002US6411542 Ferroelectric memory device having ferroelectric memory transistors connected to separate well lines
06/25/2002US6411541 Method for controlling re-writing operation for memory cell in semiconductor integrated circuit, semiconductor integrated circuit, semiconductor device equipped with many of the semiconductor integrated circuits, and electronic apparatus using the semiconductor device
06/25/2002US6411540 Ferroelectric random access memory and its operating method
06/25/2002US6411160 Semiconductor integrated circuit device
06/25/2002US6411157 Self-refresh on-chip voltage generator
06/25/2002US6410385 ROM-embedded-DRAM
06/25/2002US6410379 Method of forming a submerged semiconductor structure
06/20/2002WO2002049037A1 Semiconductor memory device and refresh control circuit
06/20/2002WO2002049036A1 Memory array
06/20/2002WO2002049035A2 Memory device and method for the operation of the same
06/20/2002WO2002049034A2 Amplifier for reading storage cells with exclusive-or type function
06/20/2002WO2002048822A2 Ram memory based on nanotechnology, capable, among other things, of replacing the hard disk in computers
06/20/2002WO2002035715A3 Polymer-, organic-, and molecular-based spintronic devices
06/20/2002WO2002029911A3 Tunelling magnetoresistance (tmr) material having ultra-thin magnetic layer
06/20/2002US20020078316 Clock synchronized dynamic memory and clock synchronized integrated circuit
06/20/2002US20020078311 Multi-port memory based on DRAM core
06/20/2002US20020078294 High-speed random access semiconductor memory device
06/20/2002US20020076872 Method for masking DQ bits
06/20/2002US20020075746 Fast accessible dynamic type semiconductor memory device
06/20/2002US20020075745 Power up initialization circuit responding to an input signal
06/20/2002US20020075742 Circuits and method for multi-level data through a single input/output pin
06/20/2002US20020075732 Semiconductor memory device
06/20/2002US20020075731 Semiconductor memory device having internal data read circuit excellent in noise immunity
06/20/2002US20020075729 Bitline pull-up circuit for compensating leakage current
06/20/2002US20020075723 Method for operating a memory cell configuration having dynamic gain memory cells
06/20/2002US20020075722 Thin-film magnetic element capable of effectively orienting magnetization direction of magnetic layer and manufacturing method thereof
06/20/2002US20020075721 Semiconductor integrated circuit with memory redundancy circuit
06/20/2002US20020075720 Semiconductor memory device having plate lines and precharge circuits
06/20/2002US20020075718 MRAM module configuration
06/20/2002US20020075706 Boosted voltage supply
06/20/2002US20020075067 Semiconductor integrated circuit
06/20/2002US20020075066 Semiconductor integrated circuit device
06/20/2002US20020075065 Charge pump
06/20/2002US20020075063 Frequency adaptive negative voltage generator
06/20/2002US20020075062 Semiconductor device capable of adjusting an internal power supply potential in a wide range
06/20/2002US20020075047 Configuration for generating a clock including a delay circuit and method thereof
06/20/2002US20020074593 Semiconductor memory device and fabrication process therefor
06/20/2002US20020074575 Integrated circuit arrangement
06/20/2002US20020074572 Semiconductor device and method of manufacturing a semiconductor device
06/20/2002US20020074568 Semiconductor memory having refresh function
06/20/2002US20020074541 Magnetic tunnel junctions using nanoparticle monolayers and applications therefor
06/20/2002DE10144245A1 Semiconductor memory device e.g. high integrated DRAM, includes isolator connected bitline of one block and precharger connected to complementary bitline, are synchronously controlled by control signal
06/20/2002DE10056546C1 Anordnung und Verfahren zur Erhöhung der Speicherdauer und der Speichersicherheit in einem ferroelektrischen oder ferromagnetischen Halbleiterspeicher Arrangement and method for increasing the storage time of the storage and security in a ferroelectric or ferromagnetic semiconductor memory
06/20/2002DE10053965A1 Verfahren zur Verhinderung unerwünschter Programmierungen in einer MRAM-Anordnung A method of preventing unwanted programming in an MRAM array
06/20/2002CA2431364A1 Ram memory based on nanotechnology, capable, among other things, of replacing the hard disk in computers
06/19/2002EP1215679A1 Programming method for a multilevel memory cell
06/19/2002EP1215678A2 Semiconductor memory, and memory access method
06/19/2002EP1214713A1 Architecture, method(s) and circuitry for low power memories
06/19/2002EP0972287B1 High-efficiency miniature magnetic integrated circuit structures
06/19/2002EP0858033B1 Circuit for repairing defective bit in semiconductor memory device and repairing method
06/19/2002EP0856793B1 Circuit for repairing defective bit in semiconductor memory device and repairing method
06/19/2002CN1354908A Integrated circuit low leakage power circuitry for use with advanced CMOS process
06/19/2002CN1354580A Signal transmission device suitable for fast signal transmission, circuit block and integrated circuit
06/19/2002CN1354519A Method for raising breakdown voltage in magnetic tunnel junction
06/18/2002US6408356 Apparatus and method for modifying signals from a CPU to a memory card
06/18/2002US6407963 Semiconductor memory device of DDR configuration having improvement in glitch immunity
06/18/2002US6407962 Memory module having data switcher in high speed memory device
06/18/2002US6407958 Semiconductor integrated circuit device with split hierarchical power supply structure
06/18/2002US6407956 Semiconductor memory device
06/18/2002US6407951 Pulse generator circuit and semiconductor memory provided with the same
06/18/2002US6407950 Semiconductor memory device capable of implementing redundancy-based repair efficiently in relation to layout and operating speed and semiconductor integrated circuit device having such semiconductor memory device
06/18/2002US6407943 Circuit for providing an adjustable reference voltage for long-life ferroelectric random access memory device
06/18/2002US6407942 Semiconductor memory device with a hierarchical word line configuration capable of preventing leakage current in a sub-word line driver
06/18/2002US6407628 Potential change suppressing circuit
06/18/2002US6407597 Semiconductor device capable of immediately recovering from erroneous state to normal state
06/18/2002US6407580 Latch sense amplifier circuit with an improved next stage buffer
06/18/2002US6407538 Voltage down converter allowing supply of stable internal power supply voltage
06/18/2002US6407426 Single electron resistor memory device and method
06/13/2002WO2002047182A1 Magnetoresistance effect device, and magnetoresistance effect magnetic head
06/13/2002WO2002047091A1 Memory circuit test system, semiconductor device, and method of tesing memory
06/13/2002WO2002047089A2 Magnetoresistive memory and method for reading out from the same
06/13/2002WO2002017327A3 Memory device having posted write per command
06/13/2002WO2002015278A3 Multigate semiconductor device and method of fabrication
06/13/2002US20020073273 Memory module with DRAM package for matching channel impedance
06/13/2002US20020071333 Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
06/13/2002US20020071332 Semiconductor memory device and data processing system having semiconductor memory device
06/13/2002US20020071329 DRAM core refresh with reduced spike current
06/13/2002US20020071328 Semiconductor device
06/13/2002US20020071327 Memory device with reduced refresh noise
06/13/2002US20020071323 Circuit for controlling wordline in SRAM