| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 05/16/2002 | US20020057605 Semiconductor memory device and method for replacing redundancy circuit |
| 05/16/2002 | US20020057601 Semiconductor memory device |
| 05/16/2002 | US20020057598 Non-volatile memory and method of non-volatile memory programming |
| 05/16/2002 | US20020057597 Current sense amplifier circuit |
| 05/16/2002 | US20020057596 Semiconductor memory device and storage method thereof |
| 05/16/2002 | US20020057595 Variable capacity semiconductor memory device |
| 05/16/2002 | US20020057594 Magnetic memory and information recording and reproducing method therefor |
| 05/16/2002 | US20020057593 Thin film magnetic memory device having a highly integrated memory array |
| 05/16/2002 | US20020057592 Distributed storage in semiconductor memory systems |
| 05/16/2002 | US20020057591 Circuit for generating timing of reference plate line in nonvolatile ferroelectric memory device and method for driving reference cell |
| 05/16/2002 | US20020057590 Method for driving nonvolatile ferroelectric memory device |
| 05/16/2002 | US20020057589 Semiconductor device including a repetitive pattern |
| 05/16/2002 | US20020057588 Bit line sensing control circuit for a semiconductor memory device and layout of the same |
| 05/16/2002 | US20020057546 Semiconductor integrated circuit device having pseudo-tuning function |
| 05/16/2002 | US20020057129 Semiconductor integrated circuit |
| 05/16/2002 | US20020057123 Dual mode fet & logic circuit having negative differential resistance mode |
| 05/16/2002 | US20020057100 Threshold invariant voltage detecting device |
| 05/16/2002 | US20020056912 Integrated circuit having a balanced twist for differential signal lines |
| 05/16/2002 | US20020056878 Semiconductor memory device |
| 05/16/2002 | US20020056870 Flash EEPROM cell and method of manufacturing the same |
| 05/16/2002 | DE10055001A1 Speicheranordnung mit einem zentralen Anschlussfeld Memory array with a central connector panel |
| 05/16/2002 | DE10050365A1 MRAM-Anordnung MRAM array |
| 05/16/2002 | DE10041378C1 MRAM-Anordnung MRAM array |
| 05/16/2002 | CA2426040A1 At-speed built-in self testing of multi-port compact srams |
| 05/15/2002 | EP1206038A1 Circuit arrangement with internal supply voltage |
| 05/15/2002 | EP1205977A2 Memory device with central connecting area |
| 05/15/2002 | EP1205938A2 Integrated circuit with test mode and method for testing a plurality of such circuits |
| 05/15/2002 | EP1205937A2 Magnetic memory device including storage element exhibiting ferromagnetic tunnel effect |
| 05/15/2002 | EP1204976A1 Method and apparatus for reading a magnetoresistive memory |
| 05/15/2002 | EP1204975A1 Multiple data rate memory |
| 05/15/2002 | CN1349683A Frequency-multiplying delay locked loop |
| 05/15/2002 | CN1349650A Storage cell arrangement and method for producing the same |
| 05/15/2002 | CN1349226A Thin film magnet storage device for writing easy-control data into current |
| 05/14/2002 | US6389563 Semiconductor memory test circuit and method for the same |
| 05/14/2002 | US6389525 Pattern generator for a packet-based memory tester |
| 05/14/2002 | US6389521 Data transfer control of a video memory having a multi-divisional random access memory and a multi-divisional serial access memory |
| 05/14/2002 | US6389497 DRAM refresh monitoring and cycle accurate distributed bus arbitration in a multi-processing environment |
| 05/14/2002 | US6388945 Semiconductor memory device outputting data according to a first internal clock signal and a second internal clock signal |
| 05/14/2002 | US6388944 Memory component with short access time |
| 05/14/2002 | US6388942 Deep pipe synchronous SRAM |
| 05/14/2002 | US6388941 Semiconductor device |
| 05/14/2002 | US6388940 Leakage-tolerant circuit and method for large register files |
| 05/14/2002 | US6388938 Semiconductor memory device |
| 05/14/2002 | US6388937 Semiconductor memory device |
| 05/14/2002 | US6388936 Static memory cell having independent data holding voltage |
| 05/14/2002 | US6388934 Semiconductor memory device operating at high speed with low current consumption |
| 05/14/2002 | US6388933 Method of controlling the conduction of the access transistors of a load less, four transistor memory cell |
| 05/14/2002 | US6388929 Semiconductor memory device performing redundancy repair based on operation test and semiconductor integrated circuit device having the same |
| 05/14/2002 | US6388920 Semiconductor memory device having faulty cells |
| 05/14/2002 | US6388918 High efficiency miniature magnetic integrated circuit structures |
| 05/14/2002 | US6388917 Method for nondestructively reading memory cells of an MRAM memory |
| 05/14/2002 | US6388916 Magnetoelectronic memory element with isolation element |
| 05/14/2002 | US6388915 Method for driving semiconductor memory |
| 05/14/2002 | US6388913 Method for detecting polarization of a ferroelectric capacitor in a ferroelectric memory and thereof structure |
| 05/14/2002 | US6388912 Quantum magnetic memory |
| 05/14/2002 | US6388493 Clock control method and circuit |
| 05/14/2002 | US6388484 Clock control circuit |
| 05/14/2002 | US6388329 Semiconductor integrated circuit having three wiring layers |
| 05/14/2002 | US6388314 Single deposition layer metal dynamic random access memory |
| 05/14/2002 | US6387476 Magnetic functional element and magnetic recording medium |
| 05/10/2002 | WO2002037572A1 Point contact array, not circuit, and electronic circuit comprising the same |
| 05/10/2002 | WO2002037501A1 Semiconductor memory, method for controlling refreshment of it, and method for setting memory cell array specific area for realizing the control method |
| 05/10/2002 | WO2002037500A1 Organic bistable device and organic memory cells |
| 05/10/2002 | WO2001097226A3 Semiconductor memory having segmented row repair |
| 05/09/2002 | US20020056022 Read/write buffers for complete hiding of the refresh of a semiconductor memory and method of operating same |
| 05/09/2002 | US20020056020 Enhanced dram with embedded registers |
| 05/09/2002 | US20020055190 Magnetic memory with structures that prevent disruptions to magnetization in sense layer |
| 05/09/2002 | US20020054535 Random access memory having a read/write address bus and process for writing to and reading from the same |
| 05/09/2002 | US20020054533 Semiconductor memory device having SRAM interface |
| 05/09/2002 | US20020054532 Semiconductor memory device having function of supplying stable power supply voltage |
| 05/09/2002 | US20020054530 Method and apparatus for refreshing semiconductor memory |
| 05/09/2002 | US20020054529 Semiconductor integrated circuit device having efficiently arranged link program circuitry |
| 05/09/2002 | US20020054525 Semiconductor memory device having a relaxed pitch for sense amplifiers |
| 05/09/2002 | US20020054523 Activation of word lines in semiconductor memory device |
| 05/09/2002 | US20020054522 Semiconductor memory device |
| 05/09/2002 | US20020054521 Semiconductor device making reliable initial setting |
| 05/09/2002 | US20020054519 Semiconductor memory and controlling method thereof |
| 05/09/2002 | US20020054518 Semiconductor memory device having redundancy |
| 05/09/2002 | US20020054517 Sequence circuit and semiconductor device using sequence circuit |
| 05/09/2002 | US20020054516 Semiconductor device |
| 05/09/2002 | US20020054515 Semiconductor memory device having row buffers |
| 05/09/2002 | US20020054514 Semiconductor memory device and defect remedying method thereof |
| 05/09/2002 | US20020054511 Nonvolatile memory system, semiconductor memory and writing method |
| 05/09/2002 | US20020054506 Nonvolatile semiconductor memory device and data writing method therefor |
| 05/09/2002 | US20020054505 Method for storing and reading data in a multilevel nonvolatile memory |
| 05/09/2002 | US20020054504 Nonvolatile memory device, having parts with different access time, reliablity, and capacity |
| 05/09/2002 | US20020054503 Semiconductor memory device having memory cell array structure with improved bit line precharge time and method thereof |
| 05/09/2002 | US20020054502 Memory cell using negative differential resistance field effect transistors |
| 05/09/2002 | US20020054501 Integrated ferroelectric memory having plate lines selected by a column decoder |
| 05/09/2002 | US20020054500 Magnetic memory device including storage element exhibiting ferromagnetic tunnel effect |
| 05/09/2002 | US20020054461 Cpp spin-valve device |
| 05/09/2002 | US20020054045 Memory device and method |
| 05/09/2002 | US20020053944 Circuit configuration for switching over a receiver circuit in particular in DRAM memories and DRAM memory having the circuit configuration |
| 05/09/2002 | US20020053943 Semiconductor integrated circuit device capable of externally monitoring internal voltage |
| 05/09/2002 | US20020053940 Temperature dependent circuit, and current generating circuit, inverter and oscillation circuit using the same |
| 05/09/2002 | US20020053691 Reduced topography DRAM cell fabricated using a modified logic process and method for operating same |
| 05/08/2002 | EP1204147A1 Semiconductor element and semiconductor memory device using the same |
| 05/08/2002 | EP1204146A1 Semiconductor element and semiconductor memory device using the same |
| 05/08/2002 | EP1204122A2 A method of determining the location of a defect in an integrated circuit and how to use this integrated circuit |
| 05/08/2002 | EP1204121A2 Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme |