Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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10/31/2002 | US20020159295 Nonvolatile semiconductor memory device |
10/31/2002 | US20020159293 Higher program vt and faster programming rates based on improved erase methods |
10/31/2002 | US20020159289 Semiconductor memory device having increased memory capacity while reducing mounting area and stand-by current |
10/31/2002 | US20020159288 MRAM array and access method thereof |
10/31/2002 | US20020159287 Shadow ram cell using a ferroelectric capacitor |
10/31/2002 | US20020159286 MRAM and access method thereof |
10/31/2002 | US20020159285 Data balancing scheme in solid state storage devices |
10/31/2002 | US20020159203 Magnetoresistance effect element |
10/31/2002 | US20020158924 Processing of images for high volume pagewidth printing |
10/31/2002 | US20020158669 Semiconductor memory device input circuit |
10/31/2002 | US20020158275 Power down voltage control method and apparatus |
10/31/2002 | US20020158271 Semiconductor integrated circuit |
10/31/2002 | DE10214707A1 Auffrisch-Mechanismus in dynamischen Speichern Refresh mechanism in dynamic memories |
10/30/2002 | EP1253652A2 Semiconductor memory device including memory cell portion and peripheral circuit portion |
10/30/2002 | EP1253651A2 Semiconductor memory device using magneto resistive effect element |
10/30/2002 | EP1253597A1 Method and circuit for generating reference voltages for reading a multilevel memory cell |
10/30/2002 | EP1253596A2 Power down voltage control method and apparatus |
10/30/2002 | EP1253595A2 Power down voltage control method and apparatus |
10/30/2002 | EP1253521A2 Method and apparatus for signaling between devices of a memory system |
10/30/2002 | EP1252632A2 Flash memory cell and method to achieve multiple bits per cell |
10/30/2002 | EP1252630A2 A prefetch write driver for a random access memory |
10/30/2002 | EP1252627A2 Arrangement for voltage supply to a volatile semiconductor memory |
10/30/2002 | CN1377503A Method and circuit for evaluating information content of memory cell |
10/30/2002 | CN1377091A 半导体器件及其制造方法 Semiconductor device and manufacturing method thereof |
10/30/2002 | CN1377042A Programmable storage and its programming method |
10/30/2002 | CN1377040A Semiconductor memory device and information process system |
10/30/2002 | CN1377039A Improved SRAM and its method |
10/30/2002 | CN1093702C Fast progapation technique in CMOS integrated circuits |
10/30/2002 | CN1093678C PMOS ROM address line decoding device |
10/29/2002 | US6473872 Address decoding system and method for failure toleration in a memory bank |
10/29/2002 | US6473865 Apparatus comprising clock control circuit, method of controlling clock signal and device using internal clock signal synchronized to external clock signal |
10/29/2002 | US6473838 Data transfer system for multiple network processors using dual DRAM storage |
10/29/2002 | US6473828 Virtual channel synchronous dynamic random access memory |
10/29/2002 | US6473468 Data transmission device |
10/29/2002 | US6473360 Synchronous semiconductor memory device capable of high speed reading and writing |
10/29/2002 | US6473358 Semiconductor memory device |
10/29/2002 | US6473354 Semiconductor integrated circuit device and method of activating the same |
10/29/2002 | US6473353 Refresh method capable of reducing memory cell access time in semiconductor memory device |
10/29/2002 | US6473352 Semiconductor integrated circuit device having efficiently arranged link program circuitry |
10/29/2002 | US6473351 Nanocapsules containing charged particles, their uses and methods of forming same |
10/29/2002 | US6473350 Semiconductor memory device having memory cell array structure with improved bit line precharge time and method thereof |
10/29/2002 | US6473349 Cascode sense AMP and column select circuit and method of operation |
10/29/2002 | US6473348 Data sensing circuit of semiconductor memory |
10/29/2002 | US6473347 Semiconductor device having memory with effective precharging scheme |
10/29/2002 | US6473346 Self burn-in circuit for semiconductor memory |
10/29/2002 | US6473340 Reading method and circuit for a non-volatile memory |
10/29/2002 | US6473338 Analog voltage supply circuit for a non-volatile memory |
10/29/2002 | US6473337 Memory device having memory cells with magnetic tunnel junction and tunnel junction in series |
10/29/2002 | US6473336 Magnetic memory device |
10/29/2002 | US6473335 MRAM configuration |
10/29/2002 | US6473333 Storage circuit with layered structure element |
10/29/2002 | US6473332 Electrically variable multi-state resistance computing |
10/29/2002 | US6473331 Semiconductor memory device and various systems mounting them |
10/29/2002 | US6473330 Chain type ferroelectric memory with isolation transistors coupled between a sense amplifier and an equalization circuit |
10/29/2002 | US6473329 Semiconductor memory and method for accessing semiconductor memory |
10/29/2002 | US6473328 Three-dimensional magnetic memory array with a minimal number of access conductors therein |
10/29/2002 | US6473325 Bit line sensing control circuit for a semiconductor memory device and layout of the same |
10/29/2002 | US6473324 Layout of a sense amplifier with accelerated signal evaluation |
10/29/2002 | US6472926 Internal voltage generation circuit |
10/29/2002 | US6472922 System and method for flexibly distributing timing signals |
10/29/2002 | US6472920 High speed latch circuit |
10/29/2002 | US6472263 Negative resistance memory cell and method |
10/29/2002 | US6472230 Re-settable tristate programmable device |
10/29/2002 | US6472052 Digital camera print roll with periodic anisotropic stiffness |
10/29/2002 | US6471336 Nozzle arrangement that incorporates a reversible actuating mechanism |
10/24/2002 | WO2002084706A2 Integrated magnetoresistive semiconductor memory arrangement |
10/24/2002 | WO2002084705A2 Method for operating an mram semiconductor memory arrangement |
10/24/2002 | WO2002069359A3 Magnetoelectronics element having a switching energy barrier |
10/24/2002 | WO2002061752A3 Mram architecture and system |
10/24/2002 | US20020157056 Method and apparatus for updating an error-correcting code during a partial line store |
10/24/2002 | US20020156986 Storage medium, a data obtaining apparatus, a data holding apparatus, a data obtaining method, and a data holding method |
10/24/2002 | US20020156967 Semiconductor memory device |
10/24/2002 | US20020155667 Ferroelectric memory and electronic apparatus |
10/24/2002 | US20020155666 Ferroelectric memory and electronic apparatus |
10/24/2002 | US20020155627 Method of fabricating magnetic random access memory operating based on tunnel magnetroresistance effect |
10/24/2002 | US20020154566 Sending signal through integrated circuit during setup time |
10/24/2002 | US20020154565 Method and apparatus for read operation and write operation in semiconductor memory device |
10/24/2002 | US20020154564 Semiconductor integrated circuit device |
10/24/2002 | US20020154563 Fuse read sequence for auto refresh power reduction |
10/24/2002 | US20020154562 Semiconductor integrated circuit device |
10/24/2002 | US20020154561 Sense amplifier for reduction of access device leakage |
10/24/2002 | US20020154557 Semiconductor memory apparatus |
10/24/2002 | US20020154554 Ferroelectric memory and electronic apparatus |
10/24/2002 | US20020154543 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks |
10/24/2002 | US20020154540 Magnetic memory |
10/24/2002 | US20020154539 Pulsed write techniques for magneto-resistive memories |
10/24/2002 | US20020154538 Magnetic memory and driving method therefor |
10/24/2002 | US20020154537 Memory cell configuration and method for operating the configuration |
10/24/2002 | US20020154536 Multi-function serial I/O circuit |
10/24/2002 | US20020154535 High density non-volatile memory device |
10/24/2002 | US20020154534 Method and circuit for determining sense amplifier sensitivity |
10/24/2002 | US20020154533 Ferroelectric memory and operating method therefor |
10/24/2002 | US20020154531 Programmable resistance memory array |
10/24/2002 | US20020154455 Magnetic device with a coupling layer and method of manufacturing and operation of such device |
10/24/2002 | US20020154189 Print assembly for a wide format pagewidth printer |
10/24/2002 | US20020153580 Semiconductor memory device using megneto resistive element and method of manufacturing the same |
10/24/2002 | US20020153555 Nonvolatile semiconductor memory |
10/24/2002 | US20020153547 Semiconductor memory device including magneto resistive element and method of fabricating the same |
10/24/2002 | US20020153545 Semiconductor memory device |
10/24/2002 | US20020153542 Single transistor ferroelectric memory cell, device and method for the formation of the same incorporating a high temperature ferroelectric gate dielectric |