| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 05/08/2002 | EP1204120A2 Magnetoresistive memory and reading method |
| 05/08/2002 | EP1204119A2 Sequence circuit and semiconductor device using sequence circuit |
| 05/08/2002 | EP1204118A2 Semiconductor memory device having SRAM interface |
| 05/08/2002 | EP1203450A1 Enhanced single event upset immune latch circuit |
| 05/08/2002 | EP0834134A4 Delay reduction in transfer of buffered data between two mutually asynchronous buses |
| 05/08/2002 | DE10134018A1 Halbleitervorrichtung, die eine interne Spannung wirksam erzeugen kann A semiconductor device which can generate an internal voltage effective |
| 05/08/2002 | DE10052211A1 Test arrangement for integrated circuit memory chips |
| 05/08/2002 | CN2490645Y Multiple internal access device |
| 05/08/2002 | CN1348221A Magnetic resistance apparatus and/or multi-magnetic resistance apparatus |
| 05/08/2002 | CN1348190A Method and apparatus for nondestructive magnetic resistance random access storing unit of memory |
| 05/08/2002 | CN1084516C Semi-conductor memory |
| 05/07/2002 | US6385159 Semiconductor memory device including an SOI substrate |
| 05/07/2002 | US6385128 Random access memory having a read/write address bus and process for writing to and reading from the same |
| 05/07/2002 | US6385127 Synchronous semiconductor device and method for latching input signals |
| 05/07/2002 | US6385126 Clock synchronization circuit and semiconductor device having the same |
| 05/07/2002 | US6385125 Synchronous semiconductor integrated circuit device capable of test time reduction |
| 05/07/2002 | US6385124 Semiconductor device including a memory cell array |
| 05/07/2002 | US6385123 Integrated circuit having a decoder unit and an additional input of a decoder unit to determine a number of outputs to be activated |
| 05/07/2002 | US6385122 Row and column accessible memory with a built-in multiplex |
| 05/07/2002 | US6385118 Semiconductor integrated circuit device |
| 05/07/2002 | US6385117 Negative voltage generating circuit with high control responsiveness which can be formed using transistor with low breakdown voltage and semiconductor memory device including the same |
| 05/07/2002 | US6385115 Semiconductor memory device with sense amplifier power supply configuration capable of supplying stable power supply voltage to sense amplifiers |
| 05/07/2002 | US6385113 Method for operating an integrated circuit having a sleep mode |
| 05/07/2002 | US6385111 Reference signal generation for magnetic random access memory devices |
| 05/07/2002 | US6385110 Multilevel non-volatile semiconductor memory device |
| 05/07/2002 | US6385109 Reference voltage generator for MRAM and method |
| 05/07/2002 | US6385106 Synchronous type flip-flop circuit of semiconductor device |
| 05/07/2002 | US6385105 Semiconductor memory and method of saving energy of the memory |
| 05/07/2002 | US6385104 Semiconductor memory device having a test mode decision circuit |
| 05/07/2002 | US6385103 Semiconductor memory device having a circuit for testing memories |
| 05/07/2002 | US6385101 Programmable delay control for sense amplifiers in a memory |
| 05/07/2002 | US6385100 Semiconductor memory device with improved column selecting operation |
| 05/07/2002 | US6385098 Method and apparatus for supplying regulated power to memory device components |
| 05/07/2002 | US6385095 Semiconductor memory device |
| 05/07/2002 | US6385094 Method and apparatus for achieving efficient memory subsystem write-to-read turnaround through read posting |
| 05/07/2002 | US6385092 Nonvolatile memory system, semiconductor memory, and writing method |
| 05/07/2002 | US6385087 Nonvolatile semiconductor memory device |
| 05/07/2002 | US6385085 Nonvolatile semiconductor memory and read method |
| 05/07/2002 | US6385083 MRAM device including offset conductors |
| 05/07/2002 | US6385082 Thermally-assisted magnetic random access memory (MRAM) |
| 05/07/2002 | US6385081 Semiconductor integrated circuit |
| 05/07/2002 | US6385079 Methods and structure for maximizing signal to noise ratio in resistive array |
| 05/07/2002 | US6385078 Ferroelectric random access memory (FRAM) device and method for controlling read/write operations thereof |
| 05/07/2002 | US6385077 Non-volatile memory cell and sensing method |
| 05/07/2002 | US6385076 Nonvolatile memory and its driving method |
| 05/07/2002 | US6385074 Integrated circuit structure including three-dimensional memory array |
| 05/07/2002 | US6384674 Semiconductor device having hierarchical power supply line structure improved in operating speed |
| 05/07/2002 | US6384672 Dual internal voltage generating apparatus |
| 05/07/2002 | US6384664 Differential voltage sense circuit to detect the state of a CMOS process compatible fuses at low power supply voltages |
| 05/07/2002 | US6384600 Magnetic field sensor comprising a spin tunneling junction element |
| 05/07/2002 | US6384445 Semiconductor memory device including memory cell transistors formed on SOI substrate and having fixed body regions |
| 05/07/2002 | US6384439 DRAM memory cell and array having pass transistors with recessed channels |
| 05/07/2002 | US6384435 Data cell region and system region for a semiconductor memory |
| 05/07/2002 | US6382769 Method of tab alignment in an integrated circuit type device |
| 05/02/2002 | WO2002035715A2 Polymer-, organic-, and molecular-based spintronic devices |
| 05/02/2002 | WO2002035704A1 Logic circuit |
| 05/02/2002 | WO2002035611A2 Unipolar spin diode and transistor and the applications of the same |
| 05/02/2002 | WO2002035559A2 Magnetic layer formed of multiple sub-element layers |
| 05/02/2002 | US20020053048 Semiconductor integrated circuit device |
| 05/02/2002 | US20020053007 Multilevel dram |
| 05/02/2002 | US20020053001 Memory controller and data processing system |
| 05/02/2002 | US20020051404 Synchronous semiconductor integrated circuit device capable of test time reduction |
| 05/02/2002 | US20020051403 Sub word line drive circuit for semiconductor memory device |
| 05/02/2002 | US20020051401 Semiconductor memory architecture for minimizing input/output data paths |
| 05/02/2002 | US20020051399 Semiconductor device including a fuse circuit in which the electric current is cut off after blowing so as to prevent voltage fall |
| 05/02/2002 | US20020051398 Semiconductor device, method for refreshing the same, system memory, and electronics apparatus |
| 05/02/2002 | US20020051397 Semiconductor device |
| 05/02/2002 | US20020051396 Synchronous semiconductor memory device and refresh method thereof |
| 05/02/2002 | US20020051393 Semiconductor memory provided with data-line equalizing circuit |
| 05/02/2002 | US20020051389 Activation of word lines in semiconductor memory device |
| 05/02/2002 | US20020051384 Non-volatile memory with improved sensing and method therefor |
| 05/02/2002 | US20020051381 Magnetic random access memory having voltage control circuitry for maintaining sense lines at constant low voltages |
| 05/02/2002 | US20020051380 Magnetoresistance effect element, magnetic head and magnetic recording and/or reproducing system |
| 05/02/2002 | US20020051379 Loadless 4T SRAM cell with PMOS drivers |
| 05/02/2002 | US20020051378 Semiconductor memory device and method of manufacturing the same |
| 05/02/2002 | US20020051377 Ferroelectric random access memory device |
| 05/02/2002 | US20020051376 Data read-out circuit, data read-out method, and data storage device |
| 05/02/2002 | US20020050843 Current sense ampifier circuits contanining latches for improving stability and ampilification in semiconductor devices |
| 05/02/2002 | US20020050842 Apparatus for detecting edges of input signal to execute signal processing on the basic of edge timings |
| 05/02/2002 | US20020050840 Circuit configuration and method for accelerating aging in an MRAM |
| 05/02/2002 | US20020050620 Semiconductor integrated circuit device having capacitor element |
| 05/02/2002 | US20020050606 Semi-monolithic memory with high-density cell configurations |
| 05/02/2002 | US20020050448 Electronic driver circuit for word lines in a memory matrix, and memory apparatus |
| 05/02/2002 | EP1202287A2 Method and apparatus for reducing leakage power in a cache memory |
| 05/02/2002 | EP1202286A2 DRAM memory cell |
| 05/02/2002 | EP1202285A2 Memory, writing apparatus, reading apparatus, writing method, and reading method |
| 05/02/2002 | EP1202284A2 Prevention method of unwanted programming in a MRAM memory device |
| 05/02/2002 | EP1202283A2 MRAM memory device |
| 05/02/2002 | EP1202281A1 Semiconductor memory device internally provided with logic circuit which can be readily controlled and controlling method thereof |
| 05/02/2002 | EP1200972A1 Magnetic field element having a biasing magnetic layer structure |
| 05/02/2002 | EP1200963A1 Testing rambus memories |
| 05/02/2002 | EP0741422B1 Magnetically controlled logic cell |
| 05/02/2002 | DE10149387A1 Halbleiterspeicherbauelement mit Wortleitungs-Niederspannungszufuhrleitungen A semiconductor memory device having wordline low voltage supply lines |
| 05/02/2002 | DE10147593A1 Method of transiting activating instructions to dynamic random access memory (DRAM) |
| 05/02/2002 | DE10147592A1 Memory system for providing simultaneous line/column commands has a memory controller to transmit/receive data to/from a memory device and first and second selection transmission paths to select appropriate memory devices. |
| 05/02/2002 | DE10135065A1 Halbleiterspeichervorrichtung und Verfahren für den Zugriff auf eine Speicherzelle A semiconductor memory device and method for accessing a memory cell |
| 05/02/2002 | DE10130752A1 Halbleiterspeichervorrichtung und Steuerverfahren A semiconductor memory device and control method |
| 05/01/2002 | CN1347560A Device for weighting cell resistances in magnetoresistive memory |
| 05/01/2002 | CN1347156A Semiconductor memory |
| 05/01/2002 | CN1347121A Film magnet memory capable of fast and stable reading data |