Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
07/2002
07/04/2002US20020085437 Memory architecture for micromirror cell
07/04/2002US20020085436 Circuit and method for programming and reading multi-level flash memory
07/04/2002US20020085430 Semiconductor memory device using dedicated command and address strobe signal and associated method
07/04/2002US20020085428 Arrangement of bitline boosting capacitor in semiconductor memory device
07/04/2002US20020085414 Programmable read-only memory and method for operating the read-only memory
07/04/2002US20020085412 Passivated magneto-resistive bit structure
07/04/2002US20020085411 Method for preventing unwanted programming in an MRAM configuration
07/04/2002US20020085410 Magneto-resistive random access memory
07/04/2002US20020085409 Static random access memory cell and method
07/04/2002US20020085408 Apparatus and method for pumping memory cells in a memory
07/04/2002US20020085407 Circuit and method for asynchronously accessing a ferroelectric memory device
07/04/2002US20020085404 Smart random access memory
07/04/2002US20020084835 Semiconductor device with reduced leakage of current
07/04/2002US20020084818 Duty cycle correction circuit
07/04/2002US20020084500 Magnetic random access memory and method for manufacturing the same
07/04/2002US20020084493 Memory cell with transistors having relatively high threshold voltages in response to selective gate doping
07/04/2002US20020084463 Low-power organic light emitting diode pixel circuit
07/04/2002DE10159762A1 Halbleiterspeicher Semiconductor memory
07/03/2002EP1220227A2 Apparatus and method for pumping memory cells in a memory.
07/03/2002EP1220226A2 Multi-port memory based on DRAM core
07/03/2002EP1218888A2 A symmetric segmented memory array architecture
07/03/2002EP1218887A1 Method and apparatus for supplying regulated power to memory device components
07/03/2002EP1141960B1 Read/write architecture for a mram
07/03/2002EP1141959B1 Integrated memory
07/03/2002EP1099224B1 Circuit for generating a reference voltage for reading out from a ferroelectric memory
07/03/2002EP1099221B1 Magnetoresistive memory with low current density
07/03/2002EP0772202B1 Memory device with reduced number of fuses
07/03/2002EP0733973B1 Information coherency detector contained in an integrated circuit
07/03/2002CN1357145A Dual hreshed voltage SRAM cell with bit line leakage control
07/03/2002CN1356726A Semiconductor memory and its preparing process
07/02/2002US6415399 Semiconductor memory device requiring performance of plurality of tests for each of plurality of memory circuits and method for testing the same
07/02/2002US6415390 Method and apparatus for controlling the data rate of a clocking circuit
07/02/2002US6415353 Read/write buffers for complete hiding of the refresh of a semiconductor memory and method of operating same
07/02/2002US6415340 Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths
07/02/2002US6415339 Memory device having a plurality of programmable internal registers and a delay time register
07/02/2002US6414903 Method and apparatus for crossing clock domain boundaries
07/02/2002US6414902 Use of setup time to send signal through die
07/02/2002US6414898 Method to reduce peak current for RAS cycle sensing in DRAM using non-multiplexed row and column addresses to avoid damage to battery
07/02/2002US6414897 Local write driver circuit for an integrated circuit device incorporating embedded dynamic random access memory (DRAM)
07/02/2002US6414895 Semiconductor memory device with reduced standby current
07/02/2002US6414894 Semiconductor device with reduced current consumption in standby state
07/02/2002US6414893 Nonvolatile semiconductor memory device and method of using the same
07/02/2002US6414892 Semiconductor memory device
07/02/2002US6414891 Semiconductor device including complementary data bus pair
07/02/2002US6414887 Semiconductor memory device
07/02/2002US6414885 Semiconductor integrated circuit and integrated circuit system
07/02/2002US6414883 Semiconductor memory device
07/02/2002US6414882 Low voltage charge pump apparatus and method
07/02/2002US6414881 Semiconductor device capable of generating internal voltage effectively
07/02/2002US6414880 Multiple line buffer type memory LSI
07/02/2002US6414879 Semiconductor memory device
07/02/2002US6414877 Nonvolatile semiconductor memory device
07/02/2002US6414876 Flash EEprom system
07/02/2002US6414870 Magnetoquenched superconductor valve with bilayer ferromagnetic film for uniaxial switching
07/02/2002US6414530 Semiconductor integrated circuit device, semiconductor memory system and clock synchronous circuit
07/02/2002US6414525 I/O interface circuit, semiconductor chip and semiconductor system
07/02/2002US6414517 Input buffer circuits with input signal boost capability and methods of operation thereof
07/02/2002US6414363 Semiconductor device with power cutting transistors
07/02/2002US6414300 Circuit with a sensor and non-volatile memory having a ferroelectric dielectric capacitor
07/02/2002US6414296 Multiple pixel reading of holographic data including a position error calculation
07/02/2002US6413830 Dynamic random access memory
07/02/2002US6412993 Arrangement of usage indicator in a recyclable, digital camera
06/2002
06/27/2002WO2002050842A2 Method for reading out or in a status from or to a ferroelectrical transistor of a memory cell and memory matrix
06/27/2002WO2002009126A3 Spin valve structure
06/27/2002WO2001091128A3 Semiconductor memory and controlling method thereof
06/27/2002US20020083295 Semiconductor memory
06/27/2002US20020083286 Techniques to asynchronously operate a synchronous memory
06/27/2002US20020081790 Process for producing a capacitor configuration
06/27/2002US20020080883 Signal transmission system for transmitting signals between LSI chips, receiver circuit for use in the signal transmission system, and semiconductor memory device applying the signal transmission system
06/27/2002US20020080677 Semiconductor memory device
06/27/2002US20020080676 Reduced standby power memory array and method
06/27/2002US20020080674 Circuit and method for refreshing memory cells in a DRAM
06/27/2002US20020080673 Semiconductor configuration with optimized refresh cycle
06/27/2002US20020080671 Circuits and methods for multi-level data through a single input/output pin
06/27/2002US20020080669 Semiconductor integrated circuit device
06/27/2002US20020080667 Semiconductor integrated circuit having test circuit
06/27/2002US20020080664 Semiconductor device
06/27/2002US20020080661 Circuit configuration for controlling write and read operations in a magnetoresistive memory configuration
06/27/2002US20020080660 Semiconductor device and data processing system
06/27/2002US20020080657 Semiconductor memory device and method for its test
06/27/2002US20020080656 Method of using an integrated circuit
06/27/2002US20020080649 Non-volatile multi-level semiconductor flash memory device and method of driving same
06/27/2002US20020080646 Thin film magnetic memory device including memory cells having a magnetic tunnel junction
06/27/2002US20020080645 Passivated magneto-resistive bit structure and passivation method therefor
06/27/2002US20020080644 Magnetic random access memory
06/27/2002US20020080643 Magnetic random access memory
06/27/2002US20020080642 Ferroelectric memory device
06/27/2002US20020080641 Semiconductor memory device
06/27/2002US20020080640 Dynamic RAM-and semiconductor device
06/27/2002US20020080639 256 Meg dynamic random access memory
06/27/2002US20020080534 Magneto-resistive element, magnetic head employing it, magnetic recording apparatus, and magnetic memory
06/27/2002US20020080335 Printing cartridge with capacitive sensor identification
06/27/2002US20020079956 Semiconductor integrated circuit
06/27/2002US20020079955 Circuit for generating internal power voltage in a semiconductor device
06/27/2002US20020079941 Duty cycle correction circuits that reduce distortion caused by mismatched transistor pairs
06/27/2002US20020079931 Sense amplifier drive circuit
06/27/2002US20020079543 Semiconductor device with output latch circuit outputting complementary data at high speed
06/27/2002US20020079515 Semiconductor memory device
06/27/2002DE10152102A1 Vorrichtung zum Detektieren von Eingangssignalflanken zur Signalverarbeitungsausführung auf der Basis von Flankenzeitsteuerungen An apparatus for detecting edges of the input signal to signal processing executed on the basis of edge timings
06/27/2002DE10135559A1 Statische Halbleiterspeichervorrichtung mit einem Redundanzsystem The static semiconductor memory device having a redundancy system