Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/2002
11/12/2002US6479860 Semiconductor memory device
11/12/2002US6479858 Method and apparatus for a semiconductor device with adjustable threshold voltage
11/12/2002US6479854 Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer
11/12/2002US6479851 Memory device with divided bit-line architecture
11/12/2002US6479848 Magnetic random access memory with write and read circuits using magnetic tunnel junction (MTJ) devices
11/12/2002US6479353 Reference layer structure in a magnetic storage cell
11/07/2002WO2002089147A2 Circuit and method for memory test and repair
11/07/2002WO2002089141A1 Multiple bit prefetch output data path
11/07/2002WO2002089140A2 Method and apparatus for completely hiding refresh operations in a dram device using multiple clock division
11/07/2002WO2002075818A3 Inductive storage capacitor
11/07/2002WO2002058070A3 Selection device for a semiconductor memory device
11/07/2002WO2001008159A3 Method of forming memory capacitor contact openings
11/07/2002US20020164850 Multilayer; substrate, ferroelectric dielectric barrier and interfacial oxide
11/07/2002US20020163851 Synchronous semiconductor memory device for controlling cell operations by using frequency information of a clock signal
11/07/2002US20020163849 Memory circuit having a plurality of memory areas
11/07/2002US20020163848 Dynamic random access memory device externally functionally equivalent to a static random access memory
11/07/2002US20020163847 Dynamic random access memory with low power consumption
11/07/2002US20020163846 Semiconductor device
11/07/2002US20020163845 Semiconductor device with reduced current consumption in standby state
11/07/2002US20020163844 Reference cells with integration capacitor
11/07/2002US20020163843 Word line driver for a semiconductor memory device
11/07/2002US20020163839 Methods of reading and/or writing data to memory devices including virtual ground lines and/ or multiple write circuits and related devices
11/07/2002US20020163838 Novel multi-state memory
11/07/2002US20020163837 High data rate write process for non-volatile flesh memories
11/07/2002US20020163836 Semiconductor device
11/07/2002US20020163835 Current source component with process tracking characteristics for compact programmed vt distribution of flash eprom
11/07/2002US20020163831 Molecular memory cell
11/07/2002US20020163828 Memory device with a self-assembled polymer film and method of making the same
11/07/2002US20020163559 Ink jet printhead chip with predetermined micro-electromechanical systems height
11/07/2002DE10217290A1 Verfahren zum Schreiben in einen RAM mit Spaltenlöschung Method of writing into RAM columns deletion
11/07/2002DE10215117A1 Thin film magnetic memory suitable for stable data read-out and writing
11/07/2002DE10153892A1 Halbleiterspeichervorrichtung zur gleichzeitigen Eingabe von N Datensignalen Semiconductor memory device for simultaneous input of N data signals
11/07/2002DE10121199A1 Circuit for read-out memory cells of memory matrix
11/07/2002DE10121165A1 System for initiating asynchronous latch chain
11/07/2002DE10120418A1 Common module for DDR SDRAM and SDRAM, has terminators connected to common module to output termination voltage and controller to transmit common/address and data signals to common module
11/06/2002EP1255254A2 Word line driver for a semiconductor memory device
11/06/2002EP1255253A1 Dual port memory cell
11/06/2002EP1254460A2 1t flash memory recovery scheme for over-erasure
11/06/2002EP1153394B1 Method for operating a memory cell array with self-amplifying dynamic memory cells
11/06/2002EP1105875B1 On-chip word line voltage generation for dram embedded in logic process
11/06/2002EP0890173B1 Circuit arrangement with a plurality of electronic circuit components
11/06/2002CN1378142A 数据处理系统 The data processing system
11/06/2002CN1093978C Semiconductor memory storage
11/06/2002CN1093963C Accumulated time delay reduction in synchronous transmission between two mutually asynchronous buses
11/05/2002US6477630 Hierarchical row activation method for banking control in multi-bank DRAM
11/05/2002US6477621 Parallel access virtual channel memory system
11/05/2002US6477109 Synchronous semiconductor memory device allowing data to be satisfactorily rewritten therein
11/05/2002US6477108 Semiconductor device including memory with reduced current consumption
11/05/2002US6477107 Integrated circuit memory devices having data selection circuits therein which are compatible with single and dual data rate mode operation and methods of operating same
11/05/2002US6477105 Semiconductor memory device with a hierarchical word line configuration capable of preventing leakage current in a sub-word line driver
11/05/2002US6477100 Semiconductor memory device with over-driving sense amplifier
11/05/2002US6477099 Integrated circuit with a differential amplifier
11/05/2002US6477098 Dynamic random access memory array having segmented digit lines
11/05/2002US6477096 Semiconductor memory device capable of detecting memory cell having little margin
11/05/2002US6477093 Semiconductor memory and method of operating same
11/05/2002US6477090 Semiconductor device, microcomputer and flash memory
11/05/2002US6477084 NROM cell with improved programming, erasing and cycling
11/05/2002US6477081 Integrated memory having memory cells with a magnetoresistive storage property
11/05/2002US6477080 Circuits and methods for a static random access memory using vertical transistors
11/05/2002US6477079 Voltage generator for semiconductor device
11/05/2002US6477078 Integrated memory having memory cells that each include a ferroelectric memory transistor
11/05/2002US6477077 Non-volatile memory device
11/05/2002US6477076 Ferroelectric memory device having a ferroelectric capacitor disposed on an extended active area
11/05/2002US6477075 Memory circuit/logic circuit integrated device capable of reducing term of works
11/05/2002US6477074 Semiconductor memory integrated circuit having high-speed data read and write operations
11/05/2002US6477073 256 meg dynamic random access memory
11/05/2002US6477072 Layout design method on semiconductor chip for avoiding detour wiring
11/05/2002US6476863 Image transformation means including user interface
11/05/2002US6476655 Semiconductor device
11/05/2002US6476653 DLL circuit adjustable with external load
11/05/2002US6476652 Delay locked loop for use in synchronous dynamic random access memory
11/05/2002US6476646 Sense amplifier of semiconductor integrated circuit
11/05/2002US6476641 Low power consuming circuit
11/05/2002US6476453 Semiconductor integrated circuit device having capacitor element
11/05/2002US6475866 Method for production of a memory cell arrangement
11/05/2002US6475812 Method for fabricating cladding layer in top conductor
10/2002
10/31/2002WO2002086906A2 Method for the comparison of the address of a memory access with the already known address of a defective memory cell
10/31/2002WO2002086905A2 Ferroelectric memory and operating method therefor
10/31/2002WO2002086901A2 Low power read scheme for memory array structures
10/31/2002WO2002086720A2 Method and apparatus for updating an error-correcting code during a partial line store
10/31/2002WO2002085225A1 Apparatus and method for the insertion of a medical device
10/31/2002US20020161981 Semiconductor memory device
10/31/2002US20020161977 2-port memory device
10/31/2002US20020161968 Memory system having stub bus configuration
10/31/2002US20020161967 Destructive read architecture for dynamic random access memories
10/31/2002US20020161964 Method of writing to a RAM with column clear
10/31/2002US20020159326 Semiconductor integrated circuit device
10/31/2002US20020159325 Semiconductor memory device capable of adjusting phase of output data and memory system using the same
10/31/2002US20020159323 Semiconductor memory device
10/31/2002US20020159322 Power down voltage control method and apparatus
10/31/2002US20020159321 Dram cell reading method and device
10/31/2002US20020159320 CAM circuit with radiation resistance
10/31/2002US20020159319 Method and apparatus for reducing write operation time in dynamic random access memories
10/31/2002US20020159318 Semiconductor memory device with simple refresh control
10/31/2002US20020159314 Semiconductor device, refreshing method thereof, memory system, and electronic instrument
10/31/2002US20020159312 Method of reading stored data and semiconductor memory device
10/31/2002US20020159307 Ferroelectric memory device and method of operating memory cell including ferroelectric capacitor
10/31/2002US20020159306 Ferroelectric memory device
10/31/2002US20020159301 DRAM word line voltage control to insure full cell writeback level
10/31/2002US20020159299 Data transfer circuit and semiconductor integrated circuit having the same
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