Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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11/19/2002 | US6483769 SDRAM having posted CAS function of JEDEC standard |
11/19/2002 | US6483768 Current driver configuration for MRAM |
11/19/2002 | US6483765 Semiconductor memory device and bit line connecting method thereof |
11/19/2002 | US6483764 Dynamic DRAM refresh rate adjustment based on cell leakage monitoring |
11/19/2002 | US6483763 Semiconductor memory device |
11/19/2002 | US6483762 tRCD margin |
11/19/2002 | US6483756 Sequence circuit and semiconductor device using sequence circuit |
11/19/2002 | US6483753 Endianess independent memory interface |
11/19/2002 | US6483744 Multi-state non-volatile semiconductor memory device |
11/19/2002 | US6483743 Multilevel cell memory architecture |
11/19/2002 | US6483742 Bit map addressing schemes for flash memory |
11/19/2002 | US6483741 Magnetization drive method, magnetic functional device, and magnetic apparatus |
11/19/2002 | US6483740 All metal giant magnetoresistive memory |
11/19/2002 | US6483739 4T memory with boost of stored voltage between standby and active |
11/19/2002 | US6483738 Method for driving nonvolatile ferroelectric memory device |
11/19/2002 | US6483737 Ferroelectric memory device |
11/19/2002 | US6483736 Vertically stacked field programmable nonvolatile memory and method of fabrication |
11/19/2002 | US6483734 Memory device having memory cells capable of four states |
11/19/2002 | US6483733 Dynamic content addressable memory cell |
11/19/2002 | US6483676 Magnetic head with tunneling magnetoresistive element biased by current controller |
11/19/2002 | US6483579 Clock synchronization semiconductor memory device |
11/19/2002 | US6483374 Semiconductor integrated circuit |
11/19/2002 | US6483368 Addressable diode isolated thin film cell array |
11/19/2002 | US6483359 Delay locked loop for use in semiconductor memory device |
11/19/2002 | US6483357 Semiconductor device reduced in through current |
11/19/2002 | US6483353 Current sense amplifier circuits containing latches for improving stability and amplification in semiconductor devices |
11/19/2002 | US6483351 Input-output line sense amplifier having small current consumption and direct current |
11/19/2002 | US6483350 Sense-amplifying circuit |
11/19/2002 | US6483349 Semiconductor integrated circuit device |
11/19/2002 | US6483165 Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation |
11/19/2002 | US6483139 Semiconductor memory device formed on semiconductor substrate |
11/19/2002 | US6482658 Nonvolatile ferroelectric memory having shunt lines |
11/19/2002 | US6482657 Methods of manufacturing tunnel magnetoresistive element, thin-film magnetic head and memory element |
11/14/2002 | WO2002091386A1 Associative memory, method for searching the same, network device, and network system |
11/14/2002 | WO2002091385A1 Molecular memory cell |
11/14/2002 | WO2002091384A1 A memory device with a self-assembled polymer film and method of making the same |
11/14/2002 | WO2002078057A3 A transpinnor-based sample-and-hold circuit and applications |
11/14/2002 | US20020170003 Semiconductor memory |
11/14/2002 | US20020169919 Column address path circuit and method for memory devices having a burst access mode |
11/14/2002 | US20020168820 Microelectronic programmable device and methods of forming and programming the same |
11/14/2002 | US20020168813 Stitch and select implementation in twin MONOS array |
11/14/2002 | US20020167856 Memory system |
11/14/2002 | US20020167852 Full Stress open digit line memory device |
11/14/2002 | US20020167850 Semiconductor memory device having row repair circuitry |
11/14/2002 | US20020167849 Semiconductor memory device and testing method therefor |
11/14/2002 | US20020167848 Method and circuit configuration for a memory for reducing parasitic coupling capacitances |
11/14/2002 | US20020167846 Single ended two-stage memory cell |
11/14/2002 | US20020167845 Reducing leakage current in memory cells |
11/14/2002 | US20020167838 Resistive cross point memory with on-chip sense amplifier calibration method and apparatus |
11/14/2002 | US20020167837 Memory cell with increased capacitance |
11/14/2002 | US20020167836 Retention time of memory cells by reducing leakage current |
11/14/2002 | US20020167835 Multi-port memory cell with refresh port |
11/14/2002 | US20020167834 Memory cell having reduced leakage current |
11/14/2002 | US20020167832 Data memory |
11/14/2002 | US20020167346 Circuits and methods for generating internal clock signal of intermediate phase relative to external clock |
11/14/2002 | US20020167059 Magnetoresistive element, memory element using the magnetoresistive element, and recording/reproduction method for the memory element |
11/14/2002 | US20020167033 Magnetic memory and method of operation thereof |
11/14/2002 | DE10220559A1 Datenempfangs- und Dateneingabeschaltkreis, Dateneingabeverfahren und Halbleiterspeicherbauelement Data receiving and data input circuit, the data input method and the semiconductor memory device |
11/14/2002 | DE10142025A1 Method to operate memory component with memory cells |
11/13/2002 | EP1256958A2 Multibit magnetic memory and method of operation thereof |
11/13/2002 | EP1256957A2 System and method for performing partial array self-refresh operation in a semiconductor memory device. |
11/13/2002 | EP0966742B1 Pump control circuit |
11/13/2002 | EP0844618B1 Data reading method for ferroelectric memory, and ferroelectric memory |
11/13/2002 | EP0783756B1 Non-volatile electrically alterable semiconductor memory for analog and digital storage |
11/13/2002 | CN1379485A Cladding read out conducting wire for dynamic pinning soft reference layer |
11/13/2002 | CN1379475A Semiconductor storage device and its driving method |
11/13/2002 | CN1379473A Semiconductor storage device |
11/13/2002 | CN1379472A Semiconductor storage device |
11/13/2002 | CN1379471A Semiconductor apparatus and its design method |
11/13/2002 | CN1379409A Semiconductor storage device |
11/13/2002 | CN1379408A Embracing layer read/wright conductor of soft reference layer fixed in operation |
11/13/2002 | CN1379407A Semiconductor storage device having effective and reliable redundancy process |
11/13/2002 | CN1094270C 高速计数器电路 High-speed counter circuit |
11/13/2002 | CN1094269C 脉冲串长度检测电路 A burst length detection circuit |
11/12/2002 | US6480947 Multiport memory, data processor and data processing system |
11/12/2002 | US6480946 Memory system for synchronized and high speed data transfer |
11/12/2002 | US6480439 Semiconductor device |
11/12/2002 | US6480438 Providing equal cell programming conditions across a large and high density array of phase-change memory cells |
11/12/2002 | US6480437 Semiconductor memory device permitting improved integration density and reduced accessing time |
11/12/2002 | US6480435 Semiconductor memory device with controllable operation timing of sense amplifier |
11/12/2002 | US6480431 Semiconductor having mechanism capable of operating at high speed |
11/12/2002 | US6480430 Semiconductor device making reliable initial setting |
11/12/2002 | US6480425 Semiconductor device |
11/12/2002 | US6480424 Compact analog-multiplexed global sense amplifier for RAMS |
11/12/2002 | US6480423 High-speed cycle clock-synchronous memory device |
11/12/2002 | US6480421 Circuit for reading non-volatile memories |
11/12/2002 | US6480414 Multi-level memory cell |
11/12/2002 | US6480413 Two-dimensional resonant tunneling diode memory cell |
11/12/2002 | US6480412 Magnetization control method, information storage method, magnetic functional device, and information storage device |
11/12/2002 | US6480411 Magnetoresistance effect type memory, and method and device for reproducing information from the memory |
11/12/2002 | US6480410 Nonvolatile ferroelectric memory device and method for driving the same |
11/12/2002 | US6480409 Memory modules having integral terminating resistors and computer system boards for use with same |
11/12/2002 | US6480407 Reduced area sense amplifier isolation layout in a dynamic RAM architecture |
11/12/2002 | US6480055 Decoder element for generating an output signal having three different potentials and an operating method for the decoder element |
11/12/2002 | US6480053 Semiconductor device having an internal power supply circuit |
11/12/2002 | US6480044 Semiconductor circuit configuration |
11/12/2002 | US6480039 Input buffer of an integrated semiconductor circuit |
11/12/2002 | US6480033 Semiconductor device |
11/12/2002 | US6480030 Bus configuration and input/output buffer |
11/12/2002 | US6479874 Semiconductor memory device having multilevel memory cell and method of manufacturing the same |