Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
12/2002
12/05/2002US20020181294 TRCD margin
12/05/2002US20020181293 Trcd margin
12/05/2002US20020181291 Semiconductor device having reduced leakage and method of operating the same
12/05/2002US20020181284 Nonvolatile memory and method of driving the same
12/05/2002US20020181279 Nonvolatile semiconductor memory device including correction of erratic memory cell data
12/05/2002US20020181278 Coding method of multi-level memory cell
12/05/2002US20020181277 Method and circuit for timing dynamic reading of a memory cell with control of the integration time
12/05/2002US20020181275 Data register and access method thereof
12/05/2002US20020181274 Semiconductor memory device
12/05/2002US20020181273 Semiconductor memory device
12/05/2002US20020181272 Semiconductor memory device
12/05/2002US20020181271 Dynamic random access memory cell
12/05/2002US20020181270 Configuration for evaluating a signal which is read from a ferroelectric storage capacitor
12/05/2002US20020181268 Multi-entry register cell
12/05/2002US20020180857 Fluid-dispensing chip
12/05/2002US20020180834 Wide format pagewidth inkjet printer
12/05/2002US20020180543 Clock generation circuits and integrated circuit memory devices for controlling a clock period based on temperature and methods for using the same
12/05/2002US20020180514 Power supply auxiliary circuit
12/05/2002US20020180513 Metal oxide semiconductor transistor circuit and semiconductor integrated circuit using the same
12/05/2002US20020180500 Clock generation circuit, control method of clock generation circuit, clock reproducing circuit, semiconductor memory device, and dynamic random access memory
12/05/2002US20020180499 Method for generating internal clock of semiconductor memory device and circuit thereof
12/05/2002US20020180483 Variable voltage data buffers
12/05/2002US20020180432 Transpinnor-based switch and applications
12/05/2002US20020180431 Transpinnor-based sample-and-hold circuit and applications
12/05/2002US20020179940 Semiconductor integrated circuit device with reduced leakage current
12/05/2002DE10154272A1 Verfahren zum Erzeugen einer angehobenen Spannung für einen nichtflüchtigen ferroelektrischen Speicher A method for generating a boosted voltage for a nonvolatile ferroelectric memory
12/05/2002DE10121837C1 Speicherschaltung mit mehreren Speicherbereichen A memory circuit comprising a plurality of memory areas
12/04/2002EP1263053A1 Nonvolatile semiconductor storage device and production method therefor
12/04/2002EP1263049A1 Memory cell array with ferroelectric capacitor, method for manufacturing the same, and ferroelectric memory device
12/04/2002EP1263048A1 Ferroelectric memory device and its manufacturing method, and hybrid device
12/04/2002EP1262994A2 An apparatus and method for a data path implemented using non-differential current mode techniques
12/04/2002EP1262993A2 Mram memory array
12/04/2002EP1262992A2 Magnetic recording element, magnetic memory, magnetic recording method, method for fabricating a magnetic recording element, and method for fabricating a magnetic memory
12/04/2002EP1262990A1 Memory architecture for supporting concurrent access of different types
12/04/2002EP1262989A1 System to set burst mode in a device
12/04/2002EP1261919A2 Address decoding system and method for failure tolerance in a memory bank
12/04/2002EP1166276B1 Integrated ferroelectric memory whose plate lines are selected by a column decoder
12/04/2002EP1163679B1 Method of operating an integrated memory with writable memory cells and corresponding integrated memory
12/04/2002EP1118081B1 Integrated memory with differential read amplifier
12/04/2002CN1383210A Strong dielectric storage
12/04/2002CN1383208A Semiconductor device and its mfg. method
12/04/2002CN1383166A Granular queueing body, its mfg. method and device using such queuecing body
12/04/2002CN1383155A Thin film magnet memory able to stable read out datas and write in datas
12/04/2002CN1383154A Multifunctional serial entry/output circuit
12/04/2002CN1383153A 多口存储单元结构 Multi-port memory cell structure
12/03/2002US6490685 Storage device having testing function and memory testing method
12/03/2002US6490669 Memory LSI with compressed data inputting and outputting function
12/03/2002US6490222 Decoding circuit for controlling activation of wordlines in a semiconductor memory device
12/03/2002US6490221 Semiconductor memory device with low power consumption
12/03/2002US6490218 Digital memory method and system for storing multiple bit digital data
12/03/2002US6490217 Select line architecture for magnetic random access memories
12/03/2002US6490216 Selective memory refresh circuit and method
12/03/2002US6490215 Semiconductor memory device and refreshing method of semiconductor memory device
12/03/2002US6490211 Random access memory device
12/03/2002US6490206 High-speed synchronous semiconductor memory having multi-stage pipeline structure and operating method
12/03/2002US6490204 Programming and erasing methods for a reference cell of an NROM array
12/03/2002US6490201 Non-volatile memory and method of non-volatile memory programming
12/03/2002US6490200 Non-volatile memory with improved sensing and method therefor
12/03/2002US6490197 Sector protection circuit and method for flash memory devices
12/03/2002US6490196 Method for operating a nonvolatile memory having embedded word lines
12/03/2002US6490195 Semiconductor device, data processing system and a method for changing threshold of a non-volatile memory cell
12/03/2002US6490194 Serial MRAM device
12/03/2002US6490193 Forming and storing data in a memory cell
12/03/2002US6490192 Device for evaluating cell resistances in a magnetoresistive memory
12/03/2002US6490191 Method and configuration for compensating for parasitic current losses
12/03/2002US6490190 Memory cell configuration, magnetic ram, and associative memory
12/03/2002US6490189 Boost voltage generating circuit for nonvolatile ferroelectric memory device and method for generating boost voltage
12/03/2002US6489912 Analog-to-digital converter for monitoring VDDQ and dynamically updating programmable Vref when using high-frequency receiver and driver circuits for commercial memory
12/03/2002US6489823 Semiconductor device capable of generating highly precise internal clock
12/03/2002US6489822 Delay locked loop with delay control unit for noise elimination
12/03/2002US6489796 Semiconductor device provided with boost circuit consuming less current
12/03/2002US6488359 Ink jet printhead that incorporates through-chip ink ejection nozzle arrangements
11/2002
11/28/2002WO2002095827A2 Method for producing a semiconductor storage device
11/28/2002WO2002095760A1 Semiconductor memory
11/28/2002WO2002095756A2 Dynamic memory and method for testing a dynamic memory
11/28/2002WO2002069341A3 A method of synchronizing read timing in a high speed memory system
11/28/2002WO2002017322A9 Sensing device for a passive matrix memory and a read method for use therewith
11/28/2002WO2002005281A9 A high speed dram architecture with uniform access latency
11/28/2002US20020178324 High performance cost optimized memory
11/28/2002US20020178323 Semiconductor memory device having refresh circuit
11/28/2002US20020176447 Method and device for initialising an asynchronous latch chain
11/28/2002US20020176309 Controlling output current in rambus DRAM
11/28/2002US20020176308 Semiconductor integrated circuit device with memory blocks and a write buffer capable of storing write data from an external interface
11/28/2002US20020176307 Bank control circuit in rambus DRAM and semiconductor memory device thereof
11/28/2002US20020176306 Semiconductor memory and method of testing semiconductor memory
11/28/2002US20020176305 Semiconductor integrated circuit device having internal supply voltage generating circuit
11/28/2002US20020176304 Two stage low voltage ferroelectric boost circuit
11/28/2002US20020176303 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array
11/28/2002US20020176302 Cell data protection circuit in semiconductor memory device and method of driving refresh mode
11/28/2002US20020176301 Virtual static random access memory device and driving method therefor
11/28/2002US20020176300 Refresh-circuit-containing semiconductor memory device
11/28/2002US20020176297 Semiconductor memory device
11/28/2002US20020176295 Semiconductor memory device allowing easy characteristics evaluation
11/28/2002US20020176292 Semiconductor integrated circuit device
11/28/2002US20020176290 Memory architecture with refresh and sense amplifiers
11/28/2002US20020176287 Redundancy circuit of semiconductor memory device
11/28/2002US20020176277 Magnetic memory device
11/28/2002US20020176275 Alternating reference wordline scheme for fast dram
11/28/2002US20020176274 Ferroelectric random access memory and its operating method
11/28/2002US20020176273 Boost voltage generating circuit for nonvolatile ferroelectric memory device and method for generating boost voltage
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