| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
|---|
| 02/12/2003 | CN1396600A 半导体存储器 Semiconductor memory |
| 02/12/2003 | CN1396599A Semiconductor memory device for reading data and error correction in refresh operating procedure |
| 02/12/2003 | CN1396598A Magnetic memory device |
| 02/12/2003 | CN1396502A Clock synchronous circuit |
| 02/12/2003 | CN1101587C Semiconductor memory device comprising address transmission detecting circuit |
| 02/12/2003 | CN1101574C Association element, association device used the same and method thereof |
| 02/11/2003 | US6519726 Semiconductor device and testing method of the same |
| 02/11/2003 | US6519675 Two step memory device command buffer apparatus and method and memory devices and computer systems using same |
| 02/11/2003 | US6519204 Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme |
| 02/11/2003 | US6519203 Ferroelectric random access memory and its operating method |
| 02/11/2003 | US6519201 Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs |
| 02/11/2003 | US6519200 Semiconductor device, method for refreshing the same, and electronic equipment |
| 02/11/2003 | US6519199 Semiconductor memory device |
| 02/11/2003 | US6519198 Semiconductor memory device |
| 02/11/2003 | US6519197 Sense amplifier with improved read access |
| 02/11/2003 | US6519195 Semiconductor integrated circuit |
| 02/11/2003 | US6519194 Semiconductor memory device with a rapid packet data input, capable of operation check with low speed tester |
| 02/11/2003 | US6519193 Semiconductor integrated circuit device having spare word lines |
| 02/11/2003 | US6519191 Semiconductor integrated circuit device having an internal voltage generation circuit layout easily adaptable to change in specification |
| 02/11/2003 | US6519190 Circuits and methods for inputting multi-level data through a single input/output pin |
| 02/11/2003 | US6519189 Apparatus and a method for a data output circuit in a semiconductor memory |
| 02/11/2003 | US6519187 Semiconductor memory device having read data multiplexer |
| 02/11/2003 | US6519186 Non-volatile semiconductor memory device configured to read data at a high speed |
| 02/11/2003 | US6519185 Flash EEprom system |
| 02/11/2003 | US6519180 Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system |
| 02/11/2003 | US6519179 Magnetic tunnel junction device, magnetic memory adopting the same, magnetic memory cell and access method of the same |
| 02/11/2003 | US6519178 Current leakage reduction for loaded bit-lines in on-chip memory structures |
| 02/11/2003 | US6519176 Dual threshold SRAM cell for single-ended sensing |
| 02/11/2003 | US6519175 Ferroelectric memory device |
| 02/11/2003 | US6519174 Early write DRAM architecture with vertically folded bitlines |
| 02/11/2003 | US6519171 Semiconductor device and multichip module |
| 02/11/2003 | US6518835 Semiconductor integrated circuit device having an optimal circuit layout to ensure stabilization of internal source voltages without lowering circuit functions and/or operating performance |
| 02/11/2003 | US6518831 Boosting circuit for high voltage operation |
| 02/11/2003 | US6518829 Driver timing and circuit technique for a low noise charge pump circuit |
| 02/11/2003 | US6518827 Sense amplifier threshold compensation |
| 02/11/2003 | US6518807 Mixed delay locked loop circuit |
| 02/11/2003 | US6518798 Sense amplifier with improved latching |
| 02/11/2003 | US6518746 Integrated circuit device having a burn-in mode for which entry into and exit from can be controlled |
| 02/11/2003 | US6518609 Niobium or vanadium substituted strontium titanate barrier intermediate a silicon underlayer and a functional metal oxide film |
| 02/11/2003 | US6518595 Semiconductor memory device for reducing power consumption during refresh |
| 02/11/2003 | US6518589 Dual mode FET & logic circuit having negative differential resistance mode |
| 02/06/2003 | WO2003010772A1 Non orthogonal mram device |
| 02/06/2003 | US20030028835 Semiconductor integrated circuit |
| 02/06/2003 | US20030028745 Semiconductor storage device |
| 02/06/2003 | US20030028712 Semiconductor memory |
| 02/06/2003 | US20030026163 High-speed cycle clock-synchrounous memory device |
| 02/06/2003 | US20030026162 Calibration method and memory system |
| 02/06/2003 | US20030026161 Semiconductor memory |
| 02/06/2003 | US20030026156 Semiconductor device |
| 02/06/2003 | US20030026155 Semiconductor memory module and register buffer device for use in the same |
| 02/06/2003 | US20030026154 Reference voltage generating circuit of nonvolatile ferroelectric memory device |
| 02/06/2003 | US20030026153 DRAM sense amplifier having pre-charged transistor body nodes |
| 02/06/2003 | US20030026152 Semiconductor memory |
| 02/06/2003 | US20030026151 Semiconductor memory |
| 02/06/2003 | US20030026150 Low power SRAM memory cell having a single bit line |
| 02/06/2003 | US20030026149 Dynamic precharge decode scheme for fast dram |
| 02/06/2003 | US20030026146 Programming method of nonvolatile semiconductor memory device |
| 02/06/2003 | US20030026139 Semiconductor module including semiconductor memory device shiftable to test mode as well as semiconductor memory device used therein |
| 02/06/2003 | US20030026138 Semiconductor memory device having write latency operation and method thereof |
| 02/06/2003 | US20030026137 Method and apparatus for determining digital delay line entry point |
| 02/06/2003 | US20030026134 Method for reading a structural phase-change memory |
| 02/06/2003 | US20030026132 Programming methods for multi-level flash eeproms |
| 02/06/2003 | US20030026127 Structure and method for the transverse field enhancement |
| 02/06/2003 | US20030026126 Memory device |
| 02/06/2003 | US20030026125 Thin film magnetic memory device including memory cells having a magnetic tunnel junction |
| 02/06/2003 | US20030026124 Semiconductor memory device |
| 02/06/2003 | US20030026123 Semiconductor memory device |
| 02/06/2003 | US20030026122 Ferroelectric memory and method for reading the same |
| 02/06/2003 | US20030026121 Vertically stacked field programmable nonvolatile memory and method of fabrication |
| 02/06/2003 | US20030026119 Semiconductor integrated circuit device having internal synchronizing circuit responsive to test mode signal |
| 02/06/2003 | US20030025551 Reference voltage generator |
| 02/06/2003 | US20030025549 Booster circuit capable of switching between a conventional mode and a low consumption current mode |
| 02/06/2003 | US20030025540 Register capable of corresponding to wide frequency band and signal generating method using the same |
| 02/06/2003 | US20030025532 Sense amplifier with configurable voltage swing control |
| 02/06/2003 | US20030025181 Semiconductor device provided with potential transmission line |
| 02/06/2003 | US20030025122 Semiconductor integrated circuit |
| 02/05/2003 | EP1282135A2 Sector protection circuit and method for flash memory devices |
| 02/05/2003 | EP1282133A1 Semiconductor memory |
| 02/05/2003 | EP1282132A2 Data storage device |
| 02/05/2003 | EP1282040A2 Data storage method for use in a magnetoresistive solid-state storage device |
| 02/05/2003 | EP1119858B1 Decoder element for producing an output signal with three different potentials and operating method for said decoder element |
| 02/05/2003 | CN1395255A Semiconductor storage and its data reading method |
| 02/05/2003 | CN1395254A 静态随机存取器 Static random access memory |
| 02/05/2003 | CN1395253A Film magnetic storage of storage unit containing tunnel magnetoresistive element |
| 02/05/2003 | CN1101081C Input circuit of semiconductor memory device |
| 02/05/2003 | CN1101049C Non-volatility integral ferroelectric film memory |
| 02/05/2003 | CN1101048C Bit map addressing schemes for fast memory |
| 02/04/2003 | US6516363 Output data path having selectable data rates |
| 02/04/2003 | US6515938 Semiconductor memory device having an echo signal generating circuit |
| 02/04/2003 | US6515937 Test circuit for testing semiconductor memory |
| 02/04/2003 | US6515935 Method and apparatus for reducing average power in memory arrays by switching a diode in or out of the ground path |
| 02/04/2003 | US6515933 Semiconductor device and semiconductor storage device testing method |
| 02/04/2003 | US6515930 Dram cell reading method and device |
| 02/04/2003 | US6515929 Partial refresh feature in pseudo SRAM |
| 02/04/2003 | US6515928 Semiconductor memory device having a plurality of low power consumption modes |
| 02/04/2003 | US6515927 Semiconductor memory having a wide bus-bandwidth for input/output data |
| 02/04/2003 | US6515926 Shared sense amplifier driver technique for dynamic random access memories exhibiting improved write recovery time |
| 02/04/2003 | US6515925 Balanced sense amplifier control for open digit line architecture memory devices |
| 02/04/2003 | US6515924 Semiconductor memory device |
| 02/04/2003 | US6515922 Memory module |